搜索资源列表
Quartus-II
- Quartus II 使用方法,叫你如何使用Quartus创建verilog hdl文件，很好很强大-Quartus II, that you use methods how to use Quartus create verilog HDL files, was very, very powerful
64
- 用vhdl写的4层楼电梯，功能强大，代码简洁！-Vhdl to write with four floors elevator, powerful, clean code!
ambe_rf
- 用verilog写了AMBE100控制器，代码风格非常好，简单功能强大，测试代码也有，便于交流-Wrote AMBE100 controller using verilog code style is very good, simple and powerful, test code is also to facilitate the exchange
dffff
- 数字钟程序可以，且有复位键实现时钟清零。为verilog程序-c51 microcontroller Guo Tianxiang video code. Inside a powerful, thank you for your use
Nios-II
- 数字电路的设计。以软件方式实现硬件电路，功能强大，开发容易。-Digital circuit design. With software to realize the hardware circuit, powerful, development easy.
PCIeDDR2add
- PCIE-DDR2-双通道ADDA板主要用于AD数据的记录与回放。该板主要使用Xilinx公司的Virtex5 FPGA，通过PCIE IP核与主机通讯，存储系统包括DDR2 SDRAM和FLASH，为各种软件无线电技术的应用提供了一个非常强大的单插槽收发器解决方案。-PCIE-DDR2 dual-channel ADDA board is mainly used for the AD data recording and playback. The board Virtex5 the FPGA
Tkstudio-
- tkstudio可以完成从工程建立到管理、编译、连接、目标代码的生成、软件仿真和硬件仿真等完整的开发流程.尤其C编译工具在产生代码的准确性和效率方面达到了较高的水平-He is a multi-core with a powerful built-in editor compiling, debugging environment, you can complete the works to establish and manage, compile, link, currently Sta
Verilog_HDL
- 基于VHDL环境的数字是种设计，仿真，还有源程序代码，等强大的设计-Based on the number of VHDL environment is a kind of design, simulation, source code, and other powerful design
TX07C1_15_SWP
- 基于CPLD和Quartys II的电子密码锁设计，简单实用，功能强大，容易实现-Based on the CPLD and Quartys II of the electronic code lock design, simple and practical, powerful function, easy to achieve
FPGA_Prototyping_Verilog
- 基于xilinx spartan 3的Verilog HDL开发详细的介绍以及实战，这本书没用枯燥的理论来讲述Verilog HDL而是用具体的芯片型号来演示Verilog HDL的强大-Development described in detail as well as actual combat, this book is useless boring theories about the Verilog HDL but with a specific chip model to demon
jtd
- 十字路口车辆穿梭，行人熙攘，车行车道，人行人道，有条不紊。那么靠什么来实现这井然秩序呢？靠的就是交通信号灯的自动指挥系统。交通信号灯控制方式很多。本系统采用MCS-51系列单片机AT89C51为中心器件来设计交通灯控制器，实现了能根据实际车流量通过8051芯片的P3口设置红、绿灯燃亮时间的功能；红绿灯循环点亮，倒计时剩5秒时黄灯闪烁警示（交通灯信号通过P1口输出，显示时间通过P0口输出至双位数码管）。本系统设计周期短、可靠性高、实用性强、操作简单、维护方便、扩展功能强。 -The interse
s4_music
- 与利用微处理器（CPU 或者MCU）来实现音乐演奏相比较，用纯硬件完成音乐演 奏电路的逻辑要相对复杂很多，如果不借助于强大的EDA 工具和硬件描述语言，纯粹 使用传统的数字逻辑技术，即使是最简单的演奏电路也很难实现-Music and the microprocessor (CPU or MCU) compared with pure hardware logic of the music circuit is relatively complex, without the help o
modedetct
- 功能强大的视频输入信号的模式识别verilog代码。可以综合，希望对大家有帮助-Powerful video input signal pattern recognition verilog code. Can be integrated, we hope to
scaler_proc
- 功能强大的视频处理相关的源代码。可以对视频画面进行缩小和放大。经过fpga验证可以被综合。-Powerful video processing-related source code. The video screen to zoom in and out. Fpga verification can be integrated.
viterbi-ip-core-using-mothed
- FPGA的Viterbi译码器IP 核的使用说明，简单方便，一目了然。还能进行tcm译码，功能强大呀-Instructions for use of the FPGA Viterbi decoder IP core, easy glance. Can tcm decoding powerful!
SIMULATION-AND-SYNTHESIS-OF-TRIPLE-DES-BLOCK-CIPH
- This project presents FPGA implementations of the DES and Triple-DES with improved security against power analysis attacks. The proposed designs use Boolean masking, a previously introduced technique to protect smart card implementations from these
WATCHDOG
- WATHCHDOG 代码，功能足够强大，公司级应用也可，适合有一定基础的学习。-WATHCHDOG code, powerful enough to company-level applications, suitable for a certain basis for learning.
canbus
- can总线的开发和设计，基于FPGA，很强大-can bus development and design, based on FPGA, very powerful
EP2C35F484
- 硬件语言verilog写的计算器，非常功能强大的计算器-Powerful hardware language verilog write a calculator, very functional calculator
DW8051
- verilog代码，51内核，是DW8051，8K ram 64K rom强大版本-verilog code, 51 cores, is DW8051, 8K ram 64K rom powerful version