搜索资源列表
cpldleifei
- 微功率无线模块、小功率无线数传模块、远距离无线通信模块、数传电台、远距离无线通信基站以及无线通信收发器等系列产品，产品主要有无线数传模块、无线通信模块、无线通讯模块、无线收发模块、无线模块、无线射频模块等等。-micropower wireless modules, low-power wireless module, remote wireless communications modules, data-transmission stations, long-distance wireles
5v
- altra下载线资料。max7000系列，下载线-downloading information. Max7000 series, download cable
ddfs
- 我自己用vhdl实现编的dds，能实现正弦波，方波，三角波。-my own use VHDL to achieve series dds, able sine, square, triangle wave.
temcon
- 此程序用汇编语言写的，适用于51系列的单片机，程序有详细的注解。-this procedure was used assembly language and applicable to the Series 51 microcontroller, the procedures detailed footnotes.
hamin0132
- 汉明码的编结码模块，用verilog写成，为Modelsim下的一个工程。-series guitar code modules, using Verilog languages, as Modelsim of a project.
sdramcore
- sdram控制的内核，高手编的，已经调试过了，没有错误-SDRAM control of the kernel, the top series, has been tuned, no errors
fdpll
- 简单的可配置dpll的VHDL代码。 用于时钟恢复后的相位抖动的滤波有很好的效果， 而且可以参数化配置pll的级数。-simple configurable dpll VHDL code. Clock Recovery for the jitter filtering is a very good result, but can pll configuration parameters of the series.
frame_decode_and_encode
- 一个用Verilog编写的编帧、解帧及码速匹配的程序，相当经典-Verilog prepared with a series of frames, frames and solutions yards speed matching procedures, rather classic!
u-uart
- 一个可综合的串并转换接口verilog源代码-a comprehensive series of conversion and interface Verilog source code
S2P_xapp194
- VHDL，verilog串并转换源程序 Xilinx公司参考资料-VHDL, verilog Series and conversion company Xilinx reference source
1553_enc_dec
- 1553B的编解码程序很好用给大家分享 -the series 1553B decoder procedure is useful for everyone to share share
SPtransform
- Verilog HDL编写的串并转换。采用iout类型口。包含源文件和测试文件。用Modsim编译。-Verilog HDL Series and the preparation of the conversion. I used iout types. Includes source and test papers. Modsim compiler used.
lcdqewedisplay
- SED1330/1335/1336/E1330液晶显示控制器及51汇编源程序.液晶显示程序,显示图形及汉字.-SED1330/1335/1336/E1330 LCD controller and the source of 51 Series procedures. LCD procedures, and show pictures of Chinese characters.
led_decode
- 用veilog HDL编的七段译码显示电路。自己做的第一个此类程序，编译仿真通过，感觉不错-veilog HDL series with paragraph 107 of the decoder show circuit. I have done the first such procedure, compile through simulation, feeling good
FPGA_SONGER
- 基于FPGA的乐曲硬件演奏电路设计的实现，有完整的VHDL代码，并有PDF详细说明如何下载及跳线设置，并“梁祝”在GW48系列开发平台上下载调试成功。音乐优美-FPGA-based hardware music concert circuit design to achieve a complete VHDL code. and a detailed account of how the PDF download and set up the jumper, and "Butterfl
FPGA_TENNIS
- 基于FPGA的乒乓球游戏硬件电路的设计与实现，有完整的VHDL代码，并有PDF详细说明如何下载及跳线设置，并在GW48系列开发平台上下载调试成功-FPGA-based table tennis game hardware circuit design and realization of a complete VHDL code. and a detailed account of how the PDF download and jumper settings and in a series
traffic2
- 用verilog编的小程序,希望对需要的人有所帮助-verilog series with a small procedure, and I hope to the people in need some help
9.2_LCD_PULSE
- 基于Verilog-HDL的硬件电路的实现 9.2 具有LCD显示单元的可编程单脉冲发生器 9.2.1 LCD显示单元的工作原理 9.2.2 显示逻辑设计的思路与流程 9.2.3 LCD显示单元的硬件实现 9.2.4 可编程单脉冲数据的BCD码化 9.2.5 task的使用方法 9.2.6 for循环语句的使用方法 9.2.7 二进制数转换BCD码的硬件实现 9.2.8 可编程单脉冲发生器与显示单元的接口
fibonacci
- source vhdl code implement Fibonacci series in hw
test-series-10010
- 用于检测序列10010的程序，Verilog的状态机练习-Used to test series 10010 program, Verilog state machine practice