搜索资源列表
RLC Test
- RLC Test程序,一个电子竞赛的题目。里面有详尽的源代码。-RLC Test procedures, an electronic race issue. There are detailed source code.
hanbaosram
- 德国汉堡大学的SRAM测试代码,使用VHDL编写,供大家参考-University of Hamburg, Germany, SRAM test code, the use of VHDL, for your reference
verilog100
- 有很多例子及测试代码，对初学者很有帮助，很容易上手-a lot of examples and test code, useful for beginners, it is easy to get started
DES-source-code-by-HDL
- HDL实现的DES算法，及相关的Test bench激励文件-HDL achieve the DES algorithm, and the related documents incentive Test bench
ddr_cntl_a_withtb
- arm控制FPGA的DDR测试代码，共享一下-arm control FPGA DDR test code sharing what
simple h264 vhdl encoder
- simple h264 encoder，source code and test code in vhdl，简单h264 硬件编码器，源代码及测试，vhdl语言
booth.rar
- 一个基于VerilogHDL语言的16位的booth算法的乘法器及其测试代码,VerilogHDL language based on the 16-bit multiplier of the booth algorithm and test code
test
- Spartan-3e LED测试代码, 用SW0进行开关控制-Spartan-3e LED test code, the switch SW0
VHDL-test-codeBooth-multiplier
- VHDL实验代码：Booth乘法器，是一个基于VHDL语言开发的程序，非常的实用-VHDL test code: Booth multiplier, is a VHDL-based language development program, a very practical
i2c
- I2C协议verilog源码，包含完整的测试代码及设计文档。-Verilog source I2C protocol, including the complete test code and design documents.
test
- 比较两个数大小的源程序，使用Verilog编写，而且包含了测试代码部分，可用modelsim仿真得到波形-Comparison of two numbers the size of source, using Verilog write, but also contains some test code that can be used to be waveform simulation modelsim
PN4
- 语言：VHDL 功能：该PN4序列的特点为将一个4位序列的前两位取异或，再让序列左移一位，用异或的结果作为序列的最后一位。序列周期是15，即15位伪随机序列。其中包括序列的产生模块和检测模块。对于误码检测，首先捕获相位。然后，规定测试的码的总个数，统计这些码中有多少个不能满足PN序列特点的，用计数器统计个数。如果发现误码过多，可能是相位失调，重新捕获相位，再进行误码检测。 仿真工具：modelsim 综合工具：quartus -Language: VHDL function:
code
- it is the collection of the modules involved inthe design of digital fm.the code coves the key components like numerically controlled oscillator, loop filter, fir filter ,phase detector along with the complete cicuit implementation of the digital fm
booth-test-bench
- booth 乘法器的测试代码 booth testbench-booth multiplier test code booth testbench
VHDL-test-code-8-bit-shift-register
- VHDL实验代码：8位移位寄存器，这是一个基于VHDL的8位寄存器，非常实用的一个小程序-VHDL test code: 8-bit shift register, which is a VHDL-based 8-bit registers, a very useful little program
VHDL-test-code-divider
- VHDL实验代码：除法器，是一个基于VHDL语言开发的小程序，是关于除法的算法，比较实用-VHDL test code: divider, is a VHDL-based language developed by a small program, on the division algorithm, more practical
VHDL-test-code-Timing-Components
- VHDL实验代码：时序部件实验-启停电路，这是一个基于VHDL开发的程序，非常的实用-VHDL test code: Timing Components experiment- start-stop circuit, a VHDL-based development process, a very practical
VHDL-test-code-general-register
- VHDL实验代码：通用寄存器组，这是一个基于VHDL开发的程序，非常的实用-VHDL test code: general register, which is a VHDL-based development process, a very practical
S3DSP_PROM-TEST
- FPGA PROM test code in VHDL.
latticeECP3-serdes-test-code
- lattice ECP3系列高速FPGA serdes测试代码-lattice ECP3 series high speed serdes test code