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time
- 用单片机及位LED数码管显示时分秒，以及24时的计时方式运行。能够整点提醒（短蜂鸣，次数代表整点时间），使用按键开关可实现时，分调整，秒表/时钟功能转换，省电（关闭显示）及定时设定提醒（蜂鸣器）等功能-With the microcontroller and LED digital tube display minutes and seconds, and 24 hours of run time. Reminded that the whole (short beep, the number
digital-clock
- 通过对单片机进行控制，实现数字钟定时的功能-Controlled by the microcontroller, digital clock timer function
timer
- verilog秒表fpga 4位数码管显示-verilog digital display stopwatch 4
LCD
- It is source code of Timer used LCD module
fpga
- FPGA实验案例，包含十个实验：数字钟，计时器等-FPGA test case, consists of ten experiments: digital clock, timer, etc.
design-a-clk-system-by-verilogHDL
- 利用verilog语言描述的具有调时、定时、闹钟、报时等功能的时钟系统-Verilog language to describe the use of a tune, time, alarm clock, timer and other functions of the clock system
adcpwm
- source code is an example of adc and pwm program in atmega 8535. This code will make the microcontroller converts each input of the ADC pin and make it into OCR0 value. This OCR0 value will affect the shape of the generated pwm signal. OC0 pin on POR
JTD
- 一个定时，带数码管显示倒计时的交通灯的实现-A timer with digital display countdown to the implementation of traffic lights
clock
- 大学生篮球比赛30S计时器-30S college basketball game timer
DAC_sinewave_timer_int
- 8051 1Khz sine wave generator. make use of DAC0808 and timer 0 interrupt. Also single led is blinked continuously.
vhdl
- 基于PicoBlaze的实时时钟设计。PicoBlaze是Xilinx的8位软核。采用汇编语言编写。-Uart real timer
counts1
- 计时器 具有计到59分59秒自动停止不计的功能 可按键控制其状态 启动或停止计时器-The timer has plans to 59 points 59 seconds to be automatic stop regardless of the function of the key control state start or stop the timer
clock
- 自己用Verilog HDL编的一个时钟程序，可以自动计时，设置闹钟，倒计时等功能-a timer programed with Verilog
1-ZIP
- 51定时器的应用定时计数器应用，实现P0.0口250ms输出1； 实现P0.0口1s输出0；-Application of the timer counter 51 timer application, to achieve 250ms more P0.0 output 1 achieve 1s more P0.0 output 0
Reflex
- This simple program tests the reflex of a person. It will randomly start a timer and after some seconds the person will be told to press a certain button. The CPLD or FPGA will know with a resolution of 1mS the time elapsed time between the command a
stop_watch
- 秒表设计,设计一个秒表计时器，具有全局清零信号和计数使能信号。-Stopwatch design, design a stopwatch timer, has a global reset signal and the count enable signal.
Assembly-code-examples-of-msp430f448-(CCE)
- The assembly language program code examples for MSP430f448 and Msp430f438 are described in this zipped file. The easy understanding of simple uart, adc, watchdog,timer program are included
CC2430
- CC2430基础实验源代码，帮助读者快速认知CC2430芯片 ││sch_CC2430ZDK.pdf ││ │├─1.LED │├─2.LCD │├─3.Clock模式 │├─4.External中断 │├─5.Timer中断 │├─6.Stop观看 │├─7.ADC │├─8.Temp传感器 │├─9.Joystick │├─10.UART - 液晶 │├─11.DMA │├─12.ADC_Series │├─13.Flash写作
controler
- 交通灯的控制器设计，控制红，绿，蓝，三种颜色，亮，灭，分别由三个定时器控制。- The traffic light controller design, control the red, green, blue, three kinds of color, light, destroy, respectively by three timer control.
baoshi
- （1）当计时器运行到59分49秒开始报时，每名叫1s就停叫1s，共鸣叫6响，前5响为低音，频率为740Hz；最后一响为高音，频率为1KHz； （2）至少要有分秒显示。 -(1) when the timer operation to 59 49 seconds to strike the start point, each named 1 s stop call 1 s, resonance that six ring, before 5 ring for bass, frequency