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fft_32k
- FFT 32k use VHDL MATLAB
dds正弦发生器代码
- 讲述了dds直接数字频率合成的基本原理,同时用VHDL语言编写dds原代码用于生成正弦波,并在ISE开发平台进行仿真和MATLAB验证正弦波输出结果-described dds direct digital frequency synthesis of the basic tenets addition to the use of VHDL prepared dds source used to produce sine, and ISE development platform for sim
ug_lpm_rom.rar
- quartus rom的生成 运用matlab生成.mif或.hex文件 载入rom表,quartus rom the use of matlab generated generation. mif or. hex file loading rom Table
mydesign.rar
- 基于FPGA的直接序列扩频发射机的设计与仿真。实验中以QuartusII 7.2 为设计和仿真工具, 各模块采用Verilog HDL设计并封装,顶层使用图形设计方式,最后得到的仿真结果使用Matlab描点来绘制出波形。 ,FPGA-based direct sequence spread spectrum transmitter of the design and simulation. Experiment to QuartusII 7.2 for the design and simu
firshuzilvboqi
- :介绍了基于FPGA的FIR数字滤波器的设计与实现,该设计利用Matlab工具箱设计窗函数计算FIR滤波器系数,并通过VHDL层次化设计方法,同时FPGA与单片机有机结合,采用C51及VHDL语言模块化的设计思想及进行优化编程,有效实现了键盘可设置参数及LCD显示。结果表明此实现结构能进一步完善数据的快速处理和有效控制,提高了设计的灵活性、可靠性和功能的可扩展性。 -: This paper presents FPGA-based FIR digital filter design and
MyState
- 这份是实验课上的教师和学生用的实例。关于用matlab simulink仿真状态机并生成vhdl代码的详细内容-The experimental class teachers and students to use examples. Matlab simulink simulation on the use of state machine and generates VHDL code details
MedFilter_VHDL
- 用VHDL实现了Matlab中MedFilt1函数3阶中值滤波。进行排序时没有用软件使用的排序法,而是通过简单的比较实现。-VHDL implementation using the Matlab function MedFilt1 of 3-order median filter. Sort of no use when the software used to sort the Law, but through a simple comparison of implementation.
base_fir
- 使用verilog 写的FIR滤波器,里面并有matlab程序,是从altera官网下来的。。希望对大家游泳。-Use verilog to write the FIR filter, which have matlab and procedures, are down from the official website of the altera. . Everyone would like to swim.
fftw3mat
- 介绍了如何利用c语言来实现数字信号处理中常用的fft,并介绍了如何利用matlab验证-intruduce how to use c to finish fft,and use matlba to ensure
Study_on_Key_Technologies_of_n4-DQPSK_Modulation_a
- 本文首先研究可4一DQPsK调制解调系统中调制部分的基本原理和各个模块的设计方案,重点研究成形滤波器和直接数字频率合成器 (DireetoigitalFrequeneySynihesis,简称DDS),并针对各个关键模块算法进行matlab设计仿真,展示仿真结果。其次,研究调制解调系统解调部分的基本原理和各个模块的设计方案,重点研究差分解调,数字下变频和位同步算法,也针对其各个关键模块进行算法的Matlab设计仿真。然后用Matlab对整个系统进行理论仿真,得出结论。在此基础 上,采用超高速
Project2_Template
- 用MATLAB下集成的XILINX模块判断是否是完美数-USE THE BLOCKS OF XILINX TO JUDGE A PERFECT NUMBER
linedet
- Program matlab describe line detection algorithm, we can use System Generator Tool with matlab to implement it in FPGA.
8-Horner_s-Algorithm-
- horners algorithm method for to use in VLSI and matlab
DDS4.mdl
- DDS(快速正交调制)生成正弦波形,利用相位累加字进行累加,查找查找表内容输出正弦数据,在通信领域应用很多,我采用的是matlab的simulink进行前期仿真-DDS (fast quadrature modulation) to generate sine wave, the use of the word to accumulate phase accumulation, content output sine lookup table lookup data in many applic
conv_encode
- 本设计是一个基于FPGA的咬尾卷积码编码器设计,要求使用verilog语言编写编码器模块,通过编译和综合,并通过matlab和modelsim仿真对比验证设计结果。-The design is an FPGA-based tail-biting convolutional code encoder design requires the use verilog language encoder module, through compilation and synthesis, and by c
fir_verilog_matlab
- 本设计是基于FPGA的一个FIR低通滤波器设计,要求使用Verilog语言编写滤波器模块,通过编译和综合,并通过Matlab和modelsim联合仿真验证设计结果。-This design is a FIR low-pass filter design based on FPGA, use Verilog to program filter module, and joint simulation by Matlab and modelsim to validate the design re
image-rotation
- 基于FPGA的system generator的图像旋转处理,利用system generator的图像旋转处理程序。本程序是基于system generator下的matlab运行。-FPGA-based image processing system generator rotation, the use of image rotation system generator handler. This procedure is based on matlab run under the sy
fre_dev_v0.1
- 用verilog编写的频率可以控制的三角函数发生器,其中用matlab编写的sine表存入rom中-use verilog making the generator of sine and cosine
FFT64DIF
- 实现64点的快速傅里叶运算,并用modelsim、matlab仿真。(Achieve fast Fourier operations at 64 points, and use Modelsim, matlab simulation.)
isjtc
- Use serial programming examples matlab GUI implementation, Independent component analysis for image processing, Realize image watermarking, de-noising, plus noise and other functions.