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uart
- 实现简单的UART功能,在QUARTUS4.0下编译通过,采用VERILOG HDL编写.
UART
- 一个通用串口的verilog源程序，包含发送和接收模块
UART.rar
- 主芯片：Actel的FPGA030,Verilog语言,串口发送和接收的例程，开发环境：LiberoIDE 8.5,The main chip: Actel' s FPGA030, Verilog language, the serial port to send and receive routines, development environment: LiberoIDE 8.5
uart
- fpga 串行口 接收和发送程序，采用verilong语言编写-fpga uart ，receive and send include writed by verilog language
uart
- 基于verilog语言，使用FPGA对串口功能进行模拟与实现-Based verilog language, use the serial port function simulation and FPGA implementations
UART_VERLIOG
- verilog写的UART串口-uart write by verilog.........................................
source_tx
- FPGA控制uart 串口发送，使用Verilog语言在quartus II环境下开发-uart tx FPGA verilog