搜索资源列表
videofram
- 用CPLD控制图像卡进行帧存逻辑的verilog程序,用Quartus II 5.0打开-with CPLD control image frame buffer cards logical verilog procedures, Quartus II 5.0 Open
qqq
- 数字滤波器的vhdl源代码.在quartus上运行过,里面还有matlab的仿真文件.
dct
- DCT的Verilog 程序，用QUARTUS进行开发
QuartusIIFPGACPLDapplyingfordigitalsignal
- 在quartus开发环境下，用硬件描述语言来实现不同的逻辑算法-Quartus development in the environment, using hardware descr iption language to achieve different logic algorithm
B
- 把一副图像文件转换为文本数据 以方便在quartus ii中仿真 做图像处理
saa7113_pjt
- 图像采集程序，并包含自测激励及quartus综合工程。-Image acquisition process, and includes a comprehensive self-rated motivation and quartus project.
tmt070_16bpp
- 基于MINI2440开发析的TFT LCD 驱动程序。可驱动800*480的TFT-MINI2440 developed based on analysis of the TFT LCD driver. To drive 800* 480 TFT
lili
- 基础VHDL学习,掌握VHDL程序的结构和熟悉QuartusⅡ的VHDL文本设计流程全过程，学习简单祝贺电路的设计、多层次电路设计、仿真和硬件测试。-VHDL based learning, to master the structure of VHDL procedures and familiar with the Quartus Ⅱ of the VHDL design flow the text the whole process of learning a simple congrat
quartus
- 本人上传的是quartus入门教程。是有关硬件绘图的工具教程。希望给大家提供方便。-I uploaded the quartus Tutorial. Is a tool for drawing tutorials on hardware. Want to give you convenience.
im_rotation
- 利用verilog实现实时图像旋转。本程序是基于Altera公司的Quartus实现的。-Verilog to achieve real-time image rotation. This procedure is based on Altera' s Quartus.
midfilter
- MATLAB里的simulink的dspbuilder设计的图像中值滤波，可直接运行，并可通过matlab转化到quartus中并下载到FPGA运行-MATLAB simulink in the design of dspbuilder image median filtering, can be run directly, and transformed by matlab to quartus and downloaded to the FPGA run
gfilter
- MATLAB里的simulink的dspbuilder设计的图像高斯滤波，可直接运行，并可通过matlab转化到quartus中并下载到FPGA运行-MATLAB simulink in the design of the image of dspbuilder Gaussian filter can be run directly, and transformed by matlab to quartus and downloaded to the FPGA run
EdgeDetection
- MATLAB里的simulink的dspbuilder设计的图像边缘检测，可直接运行，并可通过matlab转化到quartus中并下载到FPGA运行-Edge Detection of MATLAB simulink where dspbuilder design can be directly run, and transformed by matlab to quartus and downloaded to the FPGA run
hough_5289
- hough变换的vhdl程序设计，测试没有任何问题，可以执行，开发工具quartus，modelsim-hough transform with fpga and vhdl ，good tested and you can use it happily
VHDLFIR
- 1 由matlab计算FIR数字滤波器的滤波系数； 2 用VHDL语言设计逻辑电路，再通过QUARTUS II 软件，将各个模块的电路封装成期间，在顶层设计中通过连线，完成整个系统。 -matlab VHDL QUARTUS
MakeImageData
- 用Delphi来发生彩色LED显示屏的资料。在VHDL固件里，保存这个资料作为mif样式到ROM架构。终于FPGA芯片显示静止图像在LED屏幕。(We developed Delphi application. This application generate initial data of VHDL firmware. This data has a <*.mif> style. FPGA chip using this initial data displays still