搜索资源列表
videofram
- 用CPLD控制图像卡进行帧存逻辑的verilog程序,用Quartus II 5.0打开-with CPLD control image frame buffer cards logical verilog procedures, Quartus II 5.0 Open
im_rotation
- 利用verilog实现实时图像旋转。本程序是基于Altera公司的Quartus实现的。-Verilog to achieve real-time image rotation. This procedure is based on Altera' s Quartus.
midfilter
- MATLAB里的simulink的dspbuilder设计的图像中值滤波，可直接运行，并可通过matlab转化到quartus中并下载到FPGA运行-MATLAB simulink in the design of dspbuilder image median filtering, can be run directly, and transformed by matlab to quartus and downloaded to the FPGA run
gfilter
- MATLAB里的simulink的dspbuilder设计的图像高斯滤波，可直接运行，并可通过matlab转化到quartus中并下载到FPGA运行-MATLAB simulink in the design of the image of dspbuilder Gaussian filter can be run directly, and transformed by matlab to quartus and downloaded to the FPGA run
EdgeDetection
- MATLAB里的simulink的dspbuilder设计的图像边缘检测，可直接运行，并可通过matlab转化到quartus中并下载到FPGA运行-Edge Detection of MATLAB simulink where dspbuilder design can be directly run, and transformed by matlab to quartus and downloaded to the FPGA run
MakeImageData
- 用Delphi来发生彩色LED显示屏的资料。在VHDL固件里，保存这个资料作为mif样式到ROM架构。终于FPGA芯片显示静止图像在LED屏幕。(We developed Delphi application. This application generate initial data of VHDL firmware. This data has a <*.mif> style. FPGA chip using this initial data displays still