搜索资源列表
rs_encoder
- 一个很不错RS编码，用于DVB的信道编码，用VHDL语言编写，在FPGA上通过验证。
cossincordic.rar
- CORDIC算法的Matlab模拟，为了验证FPGA实现CORDIC算法的时间特性优于软件，用Matlab实现了一个计算sin, cos的CORDIC算法,Matlab simulation CORDIC algorithm, in order to verify the FPGA to achieve the time characteristics of CORDIC algorithm is superior to software, using Matlab calculated to
crc7
- CRC计算模块，7位CRC计算。经过FPGA及IC平台验证。-CRC calculation module, 7 CRC calculation. Through the FPGA and IC platform for verification.
crc16
- CRC16模块，用于SD卡驱动设计。经过FPGA及IC平台验证。-CRC16 module for SD card-driven design. Through the FPGA and IC platform for verification.
divider
- 流水型除法器，经过FPGA平台验证。宽度可以任意修改，提供计算完毕信号。-Water-type divider, after a FPGA platform validation. Width can be modified to provide the calculation is completed the signal.
cdma2k_ddc_12_1
- matlab simulink 开发的CDMA2K DDC数字下变频器和滤波器，使用XILINX FPGA V5系列，并包含DDC每个阶段的输出验证matlab程序，非常实用。-matlab simulink developed CDMA2K DDC digital down converter and filter, using the XILINX FPGA V5 series, and contains the output of each stage of verification DD
svd_simple
- 介绍了一种简化的SVD分解算法，这个算法已在MATLAB上验证，可以用于fpga上实现-ntroduces a simplified SVD decomposition algorithm, this algorithm has been validated in MATLAB can be used to achieve the fpga
PGC算法MATLAB仿真
- pgc算法通过DCM算法结构实现可以硬件实现的相位解调 fpga编程验证实现
femto
- 基于MATLAB的femto算法仿真和功能验证，MATLAB代做hslogic(Femto algorithm simulation and function verification based on MATLAB, MATLAB generation hslogic)
lzs-master
- 基于verilog的LZS压缩和解压算法，压缩比1；2 。里面带有C原言的代码。已经通过验证！(Verilog based LZS compression and decompression algorithm, compression ratio 1; 2. It has the C code in it. It has been verified!)
AES_加解密_verilog实现
- AES_加解密_verilog实现，已经通过FPGA验证，代码有注释，完美运行