搜索资源列表
i2c(FPGA)
- 基于FPGA的I2C总线模拟，采用verilog HDL语言编写。-FPGA-based I2C bus simulation, using verilog HDL language.
canbus(FPGA)
- 基于FPGA的can 总线设计，采用verilog语言编写。在FPGA的开发环境下，新建一个工程，然后将本文件中的各个源代码添加进工程里，即可运行仿真。-FPGA-based bus design can use verilog language. FPGA development environment, a new project, and then the paper all the source code to add the project, Simulation can be run
masterspiverilog
- spi总线控制器的fpga实现 verilog源代码及测试
EzCAN
- 实现CAN总线协议，完成数据在总线上高效、稳定的传输功能-Realize CANbus protocol, data on the bus are efficiently and stablely atransferred function
i2c
- 基于i2c总线控制的24c32C程序读写-Based on the i2c bus read and write control procedures 24c32C
AT24C256_c
- at24c256总线编程，即可以写也可以擦除．允许选择１６ＫＢ的存储器-AT24C256-bus programming, that is, can be written can also be erased. Allow choice of 16KB of memory
hing
- vhdl的一般过程代码,主要的是关于总线的配置要求-vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl
can
- can总线程序希望对大家有所帮助！ 如需相关材料，请联系-can
CAN-line
- CAN总线详细教程,精心编制,不可错过，实现从零的跨越。-Detailed tutorial of the CAN bus, well-prepared, not to be missed, to achieve a leap from zero.
485
- 在要求通信距离为几十米到上千米时，广泛采用RS-485串行总线标准。RS-485采用平衡发送和差分接收，因此具有抑制共模干扰的能力。-Requiring communication distance of tens of meters to 1000 meters, it is widely used RS-485 serial bus standard. RS-485 balanced differential transmit and receive, so it has the abili