搜索资源列表
dianti
- 基于Verilog的八层电梯设计，能够实现自动化的电梯控制。-Verilog based on the eight-lift designed to automate the elevator control.
reed
- this the completedocumentation and code about reed solomon logic implemented on fpga in verilog.-this is the completedocumentation and code about reed solomon logic implemented on fpga in verilog.
sigmadelta_verilog_code
- sigma delta verilog code and testbench for you to do simulation
lab8
- my labs on verilog. this is modeling of proccesor core
3bit_adder
- Verilog source code for a 3bit full adder build with modules using predefined nand gates.
verilog
- verilog数字系统设计-rtl综合测试平台与验证 书中源码-verilog Digital System Design-rtl test platform verification book source
fsm1
- 序列检测代码verilog 包括tb，已经验证ok-Sequence detection code verilog tb, have verified ok
aaa2
- 饮料自动售卖机，售4种不同价格的饮料，verilog代码-Beverage vending machines, sold four different price drinks verilog code
XHDL4.0.40
- vhdl语言和verilog语言转换工具 能很容易的实现两种语言的相互转换-vhdl language and the verilog language conversion tools can easily achieve the conversion of the two languages
Ver_I2C_eeprom
- 用verilog编写的I2C——E2PROM模型。适用于各种型号的E2PROM，代码内部有参数可选。-Written in verilog I2C- E2PROM model. E2PROM, the internal code applicable to various types of optional parameters.
cordic
- it is a code to implement cordic algorithm in verilog. it calculates sin and cosine of an input angle.
cordic_iterate
- it is a code for cordic algorithm in verilog. it computes sine and cosine of an angle which is the input. it is iterative structure of cordic.
CRC-Verilog
- crc的verilog程序,希望可以帮到大家-crc of verilog
RTL
- Booth radix2 MAC UNIT In verilog
lcd_driver
- 单色LCD的VERILOG驱动代码。经测试OK的。-LCD DRIVER VERILOG
shifter
- VErilog code for the 8 bit shifter
partii_fsm_SequenceUsingCase
- verilog hdl code fsm sequence detector using case ,, an FSM that recognizes two specific sequences of applied input symbols, namely four consecutive 1s or four consecutive 0s. There is an input w and an output z. Whenever w = 1 or w = 0 for fou
Elevator
- 使用verilog语言编写的实现六层楼的电梯调度算法实现。模拟仿真成功-Using verilog language to achieve six-story elevator scheduling algorithm implementation. Successful Simulation
uvm-1.1d
- uvm 源代码开发，基于此可以实现芯片验证加速和验证充分保证-uvm system verilog based code
SRC
- 4K display verilog HDL source code