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clk_generator
- 基于Verilog HDL的任意分频代码,由本人原创,可实现0.000001Hz的步进,跟网络上的大部分简单地分频不一样!-Devicetor descr ipted by Verilog,can reach 0.0000001Hz!
1011245
- 步进频雷达成像系统设计与仿真实现mabatlb-step frequency system radar target imaging
sjhuibo
- 步进频信号的回波建模,使用连续短脉冲实现雷达的高分辨测量-Echo Modeling stepping frequency signal, continuous short pulses to achieve high-resolution radar measurements