搜索资源列表
minirisc.tar
- verilog code .descrip the risc cpu.download from opencores.org
111.ver
- verilog code for CPU design by Mohammad Hosseini.
111m
- verilog code for cpu and bus.
111moh
- verilog code for cpu and registers.
CPU_code
- 基本的cpu verilog code 可用來瞭解基本cpu運作-Basic cpu verilog code can be used to understand the operation of the basic cpu
Chapter1-5
- 第一章到第五章的代码 本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例
VerilogCPU
- Verilog设计CPU这是某一本书的PDF版。-Verilog design of CPU which is a book of the PDF version.
MIPSCPU
- 用verilog描述一个mips体系结构的cpu，分别用c语言mips汇编语言写了一段程序，翻译成机器码可以再cpu上运行。仿真结果三者完全一致。-Mips architecture cpu with verilog descr iption c language mips assembly language to write a program, translated into machine code can then cpu running on. Simulation results e
Project6(finish)
- modelsim下仿真通过，用Verilog写的多周期CPU，是计算机组成原理的大作业，供学弟学妹参考。-Under modelsim simulation by using Verilog write multi-cycle CPU, is composed of a large computer operating principle for mentees reference.
CACPU
- basic cpu design in verilog
m_cycle_mips
- verilog设计的5状态多周期mips -multiple cycle mips CPU design of Verilog