搜索资源列表
async_transmitter
- 用verilog实现rs232通信async_transmitter.v-with verilog achieve rs232 communications async_transmitter.v
crc
- 循环冗余校验，crc_16,主要运用在数字通信系统。用verilog HDL编写
uart_dout
- 全双工UART口通信程序（Verilog版本）
code
- 《无线通信FPGA设计》书里的matlab和verilog代码-the matlab and verilog code in 《Wireless Communications FPGA design》
Wireless_Communication_design_of_fpga-source_code.
- 书籍“无线通信fpga设计”里的源代码实例，里面有verilog和MATLAB两种语言实例-Books " wireless communications fpga design" in the source code examples, there are two languages verilog and MATLAB examples
USBverilog
- verilog USB程序，经过实践调试，并且都能成功实现-verilog USB procedures, debugging practice, and can be successfully achieved
FPGA-Verilog-sourcecode
- 《无线通信FPGA设计》这本书中所涉及到的所有verilog的源代码-Involved in the FPGA design of wireless communications, " This book verilog source code
UART_RS232(verilog)
- /本模块的功能是验证实现和PC机进行基本的串口通信的功能。需要在PC机上安装一个串口调试工具来验证程序的功能。程序实现了一个收发一帧10个bit（即无奇偶校验位）的串口控制器，10个bit是1位起始位，8个数据位，1个结束位。串口的波特律由程序中定义的div_par参数决定，更改该参数可以实现相应的波特率。程序当前设定的div_par 的值是0x145，对应的波特率是9600。用一个8倍波特率的时钟将发送或接受每一位bit的周期时间划分为8个时隙以使通信同步.程序的工作过程是：串口处于全双工工作
serial-communication-source-code
- 这是一个有关于串口通信的原码，主要是用verilog语言来实现，采用的是模块联合方法。-This is a serial communication source code, verilog language, using the module combination method.
interleaver
- 交织程序，用verilog编写，主要用于通信当中，希望对大家有帮助-Interwoven program, written in verilog, mainly used for communication among everyone
CooperativeCommunication
- 1. 研究空时分组码的编译码原理及算法； 2. 研究了几种不同的协作分集系统模型和协作分集协议； 3. 将空时分组码编译码器与协同通信用硬件描述语言Verilog实现，并在ISE集成环境中综合仿真，结果正确后下载到FPGA电路板上； 4. 用示波器观察输出数据是否正确，验证空时分组码协同通信的性能。 -1. Decoding Principles of space-time block codes and algorithms 2. Study several differen
tiaopin
- 此程序用ISE的verilog编写，主要用于调频通信系统中，经过仿真，正确，希望对大家有帮助-This program was written with the ISE verilog mainly used for FM communications systems, simulation, and right, and I hope for all of us to help
Verilog
- 无线通信FPGA设计_代码 无线通信FPGA设计_代码-FPGA design _ code wireless communications wireless communications wireless communications FPGA design _ code _ code for FPGA design
uart_tr(3)
- uart_tr 异步串口通信主机 使用verilog HDL语言编写-uart_tr the host of the uart
experiment_4_uart_communication
- 这是一个uart串口通信的代码，是基于ise运行的verilog语言，可以实现上位机和开发板的通信以及开发板显示数据并返回累加和的功能。- This is a serial code for uart communication is based on running ise verilog language, you can achieve PC and development board communications, and development boards to display
Wireless-communication-FPGA
- 《无线通信FPGA设计》一书的verilog代码跟matlab代码，非常实用的好资料，本书是数字通信IC方向必看的- Wireless communication FPGA design, a book of verilog code with matlab code, very useful good information, this book is the direction of digital communication IC must see
bingo_spi_test
- 利用SPI实现FPGA和外设之间的通信。经过Modelsim仿真验证。（为FPGA设计技巧与案例开发详解一书源码）(Using SPI to implement communication between FPGA and peripheral. After Modelsim simulation verification. (for FPGA design techniques and case development detailed explanation of a book source
uart-master
- verilog语言实现URAT串口通信，便捷开发(Implementation of various basic circuits in digital circuits with Verilog language)