这是我个人写的DLX处理器流水线的Verilog代码，在ModelSim中仿真通过，并且在ISE中能综合！即可以下载到FPGA中运行指令，指令可以根据需要定义，也可和相应的编译器配合使用，这里给学习流水线和Verilog的朋友共享。,This is my personal wrote DLX pipeline processor Verilog code, adopted in the ModelSim simulation and can be integrated in the ISE! T

The GP outputs can be used to control anything remotely your PC might be LEDs on your FPGA board, or a coffee machine with the help of a relay.-The GP outputs can be used to control anything remotely your PC might be LEDs on your FPGA board, or a co

I2C slave功能模块的一种实现方式，简单易根据自己实际需求做修改，已经过FPGA验证可以很好的工作-An implementation of I2C slave function modules, easy to make changes according to their actual needs, has been verified FPGA can work well ...