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dlx_verilog.rar
- 这是我个人写的DLX处理器流水线的Verilog代码，在ModelSim中仿真通过，并且在ISE中能综合！即可以下载到FPGA中运行指令，指令可以根据需要定义，也可和相应的编译器配合使用，这里给学习流水线和Verilog的朋友共享。,This is my personal wrote DLX pipeline processor Verilog code, adopted in the ModelSim simulation and can be integrated in the ISE! T
ldcp_verilog
- ldpc verilog 程序 做ldpc硬件实现的可以-ldpc verilog procedures do LDPC hardware implementation can
spi_Master
- 实现了对SD卡的SPI方式下读写操作，已经测试了，可以直接用-The realization of the SD card to read and write SPI operation mode has been tested, can be directly used
comprator_str_miley
- vhdl comprator and miley version that can simulate ans synthesis in all aoftwares like modelsim and quartus and ise
fpga1
- This the VHDl file of ALU compiler that can generate +-/* of 4 bit no.-This is the VHDl file of ALU compiler that can generate +-/* of 4 bit no.