通过CPLD实现串行通信之VHDL语言，好看易懂-through CPLD serial communications VHDL, pretty easy to understand

Verilog 4位计时器,可以在CPLD开发板上成功运行-Verilog CPLD FPGA

主要是用于实现FPGA的配置，其是通过CPLD来实现，CPLD作为配置控制器。-Is mainly used to implement FPGA configuration, which is achieved through the CPLD, CPLD as a configuration controller.