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Crack_QII60_b178
- Quartus II 6.0完全Crack文件-Quartus II 6.0 document completely Crack
Verilog数字系统设计教程(第2版)
- Verilog数字系统设计教程(第2版)”这本书的思考题没有答案，要多做实验和仿真-• Source code of designs in chapters 1 to 8. • Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files. • Several Designs, including SAYEH, that are programmed o
any_div_freq
- 可以对输入时钟任意分频(整数或小数),带Quartus II 完整项目文件.-Can be arbitrary points on the input clock frequency (integer or decimal), with complete Quartus II project document.
M_ERR
- 伪随机序列与误码检测 工程文件 源代码 Quartus II仿真 结果截图-Pseudo-random sequence and error detection project file source code Quartus II simulation screenshot
FPGA实验指导书
- 很多程序实例，vhdl语言及quartus平台应用的实用实验资料(A lot of program examples, VHDL language and quartus platform application of practical experimental data)