搜索资源列表
clk
- 通过一个主时钟信号完成异步FIFO读写时钟信号的产生。编译通过实现功能。-Through a master clock signal the completion of asynchronous FIFO read and write clock signal generation. Compiler through the implementation function.
asynFifo
- 异步fifo在IC设计中,非常重要;是异步时钟域同步方法-Asynchronous fifo in IC design, is very important are asynchronous clock domain synchronization