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FPGA
- 针对MT9M111数字图像传感器,采用Cyclone系列 EP1C6Q240C6作为主控芯片,设计并实现了ITU-R BT.656视频数据的采集、色彩空间转换、DVI-I显示控制的数字视频转换系统。系统可以将传感器的输入图像以1280×960(60Hz)和 1280×1024(60Hz)格式输出到DVI-I显示器上,并具有图像静止功能,同时在系统空闲时,可以将系统设置为待机状态,来降低功耗。-Aimed at the digital image sensor MT9M111,used Cyclo
Multichannelvideomonitor
- 这是一个关于多路视频监控设计方案的文章，此文提出了一个重要的多路视频实现思想-this is a article about Multi-channel video monitor
VS_GOOD
- 详细视频监控业务相关内容，对监控行业名词做专业的解释-a very good descr iption and explain of video monitor industry
C6711
- C6711低码率监控视频编码的实现和优化 C6711低码率监控视频编码的实现和优化-Low bit rate video coding C6711 monitor the implementation and optimization of monitoring C6711 low bit rate video coding in the implementation and optimization
romote-video-monitoring-base-ip
- 该视频监控系统是数字化、网络化的监控系统，该系统采用MPEG一4高效率图像编解码技术和嵌入式设计。可提供高清晰监控图像、软件视音频切换、录放像、远程控制、远程信一号采集、WEB服务、全程集中控制等功能-The video surveillance system is digital, networked surveillance system that uses highly efficient MPEG-4 image encoding and decoding technology and
Monitor-system-of-fairway
- 为了有效控制运河航行秩序, 解决船舶乱停乱靠问题, 本文设计了远程无线数字视频监控和广播系统,实现了对运河航道的24h实时监控, 提高了管理效率, 增强了航道通航能力。-In order to effectively control the canal navigation order, solve ship stop chaos to chaos on the problem, this paper introduces the design of the remote wireless di
PCDVR
- 监控专用硬盘比较：DVR专用硬盘的设计是为了满足数字硬盘录像机对系统数据和数字图像信息的存储要求-Monitor the dedicated hard: DVR-specific hard drive is designed to meet the storage requirements of the Digital Video Recorder system data and digital image information
monitoring-center-system
- 设计安装220 kV 变电站远程视频监控系统是对变电站“四遥”功能的进一步补充。介绍了 220 kV 变电站远程视频监控中心的系统设计方案，根据系统的具体特点，设计了适应性很强的接 口规范，各子站系统根据通信接口规范设计，并以DLL 文件的形式提供给视频监控主站。系统在 ATL 框架下开发客户端控件，给出了实现视频监控中心客户站控件的具体编程过程。主站调用各 变电站通信DLL，可以实现图像及监控数据的透明传输。-The design and installation of a 2
ARM_CHONGWUWEIYANGXITPNG
- 基于ARM平台远程控制的宠物喂养系统设计与实现-In recent years, with the improvement of living standard, more and more people begin to keep pets, pets bring people many benefits, but also brought some problems: the pet is dependent on their mast
it6505官方编程指南
- it6505官方编程指南。 Reset IT6505 Following steps are the reset procedure of IT6505. 1. reg05 ← 0x3B to enable reference domain clock and reset all the other register. 2. Delay 1 millisecond. 3. reg05 ← 0x1F to reset reference clock, and reset all regi