搜索资源列表
AccelDSP
- AccelDSP Synthesis Tool Floating-Point to Fixed-Point Conversion of MATLAB Algorithms Targeting FPGAs
DSP
- 本书编制的实验项目包括“CCS基本操作”、“基本算术运算”、“定点DSP的小数运算和浮点运算”、“DSP混合编程及CCS进阶”四个验证性实验和“数字正弦振荡器的DSP实现”、“FIR数字滤波器的DSP实现”两个综合性实验，并在综合性实验中配备了相关的设计性思考题供学有余力者进行全开放式实验。-Experimental projects include the preparation of the book " CCS basic operation" , " basic
matlab_to_vhdlfpga
- 本文提出了加快发展之路 从理论设计,通过Matlab / Simulink环境 在定点算法对其行为模拟的 在FPGA或定制实现硅片。这个了 实现了netlist移植的Simulink系统 描述成的硬件描述语言[VHDL]。在这个例子中,这个 Simulink-to-VHDL转换器被设计来使用 代码来描述结构VHDL系统互连, 允许简单的行为说明基本模块。 结果VHDL bit-true交付后代码 比较定点Simu
fixpointintro
- tms320c6000关于定点DSP的相关知识 有需要的请尽快下载-About TMS320C6000 fixed-point DSP has the relevant knowledge required please download as soon as possible
sfacIntr
- 定点数只能表示一定范围内的数（整数或小数，有符号或者无符号），浮点数虽将表示数的范围给予了较充分的扩宽，但仍只能表示（理论上）无限精度的数；本导论将引入一种新类型的数——效数，来完美地表示数的范围和精度两个方面，并简要介绍（演示）效数的四则运算。-Fixed-point can only say that within a certain range of numbers (integer or decimal, signed or unsigned), floating point, said
clock1
- 用VHDL语言编写的带有闹钟功能的数字时钟，可实现定时定点闹钟。-Written in VHDL, digital clock with alarm function can be realized fixed-point alarm regularly.
DIR39
- TI最新单片高性能DSP内核，内核以高性能TIC64X+体系架构为主体，结合浮点运算指令，频率达到1GHZ，同时支持定点和浮点运算-TI latest single high-performance DSP cores, high-performance TIC64X+ core architecture as the main body, combined floating-point instructions, frequency reached 1GHZ, supports fixed p
80c51
- 80C51单片机所做的数字时钟，已测试过，绝对可用。（利用一个控制器对多路电器进行控制，同时又可以进行时钟校准和定点打铃。它可以执行不同的时间表（考试时间和日常作息时间）的打铃，可以任意设置时间。）-Made digital clock 80C51 microcontroller, has been tested, absolutely free. (Using a controller to control multiple appliances, while the clock can be
aac_decoder
- Fixed point HE-AAC Decoder
TMS320C62x_DSP_CPU_and_Instruction_Set_Reference_G
- The TMS320C6000 digital signal processor (DSP) platform is part of the TMS320 DSP family. The TMS320C62x DSP generation and the TMS320C64x DSP generation comprise fixed-point devices in the C6000 DSP platform
huishuofa--dingdiazhuose
- 回朔法解决定点着色问题 几乎都放假啊健康饭卡 就爱看了房间大法师阿sdk金发晶交大附近按回复阿卡放大看风景 C- The fixed-point question returns the new moon
Fixed-Point-Theory
- New Fixed Point Theorys in Topological Vector Spaces-In this paper, by the method which Browder ([1]) presented, we prove that two new fixed point theorems which unify, extend and improve some known results due to Browder (1968) [F. E. Browder, T
mar2010
- 基于FPGA的单精度浮点数乘法器设计，本文设计了一个基于FPGA的单精度浮点数乘法器。乘法器为五级流水线结构。设计中采用了改进的带偏移量的冗余Booth3算法和跳跃式Wallace树型结构，减少了部分积的数目，缩短了部分积累加的耗时；提出了对尾数定点乘法运算中Wallace树产生的2个伪和采用部分相加的处理方式，有效地提高了的运算速度；并且加入了对特殊值的处理模块，完善了乘法器的功能。单精度浮点数乘法器在Altera DE2开发板上进行了验证，其在Cyclone II EP2C35F672C6器
Converting-floating-point-to-32-bit-fixed-point-i
- A simple guide to Converting floating point to 32-bit fixed point in Java
51
- 51单片机的定点和浮点运算子程序以及特殊功能寄存器和汇编指令的详细列表-51 single-chip fixed-point and floating-point operations subroutine, and a detailed list of the special function registers and assembly instructions
FPGA_Project
- To design fixed point to floating point encoder and experiment with simulation, synthesis and implementation features of the Xilinx Project navigator. Specifically, the objectives of this lab are: 1. To try out basic building blocks of VHDL beh
SPWM
- 本文对SPWM波形生成的三种算法--对称规则采样法、不对称规则采样法和等效面积法分别加以分析，并通过高精度定点32位DSP微处理器TMS320F2812在线生成SPWM波形。-This paper SPWM wave generated three algorithms- symmetric regular sampling method, asymmetric regular sampling method and the equivalent area method were analyze
Fixed-point-and-floating-point
- 主要是DSP嵌入式开发的基础定点运算和浮点运算的讲解。-DSP embedded development mainly to explain the basis of fixed-point and floating-point arithmetic operations.
Microchip-AN-617---Fixed-Point-Routines
- Microchip AN 617 - Fixed Point Routines
4.-Fixed-point_M.Peter
- Using Fixed point Method to solve nonlinear equation creat by M.Peter