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xapp265
- High-Speed Data Serialization and Deserialization(840 Mb/s LVDS) for xilinx fpga
lvds-in-fpga
- lvds总线在fpga上的实现,具体参考xc3s,或者更高级别的fpga系列-the lvds bus in fpga of xilinx
Zynq-Mini-ITX-Rev-E
- Zynq Mini-ITX 单芯片可编程SOC(ARM+FPGA)开发板电路原理图 -Zynq Mini-ITX Development Board Schematics the Zynq Mini-ITX development board features 2 GB DDR3 SDRAM, PCIe Gen2 x16 Root Complex slot (x4 electrical), SATA-III interface, SFP interface, QSPI Flash me