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bianyiyuanlisheji
- 1. PL/0 语言介绍 ●PL/0 程序设计语言是一个较简单的语言，它以赋值语句为基础，构造概念有顺序、条件和重复（循环）三种。PL/0 有子程序概念，包括过程定义（可以嵌套）与调用且有局部变量说明。PL/0语言编译程序采用以语法分析为核心、一遍扫描的编译方法。词法分析和代码生成作为独立的子程序供语法分析程序调用。语法分析的同时，提供了出错报告和出错恢复的功能。在源程序没有错误编译通过的情况下，调用类PCODE解释程序解释执行生成的类PCODE代码。 ●保留字(关键字)：所谓保留字是指
uart766
- ---实现的部分VHDL 程序如下。 --- elsif clk1x event and clk1x = 1 then ---if std_logic_vector(length_no) >= “0001” and std_logic_vector(length_no) <= “1001” then -----数据帧数据由接收串行数据端移位入接收移位寄存器---rsr(0) <= rxda --- rsr(7 downto 1) <= rsr(6 down
XOR2
- 两输入异或门 两输入异或门-Two-input XOR gate two input XOR gate
rateVSpercentage
- 神经网络系统 BP,MGFPROP,SAMGFPROP, QUICKPROP, SARPROP 解决XOR问题收敛速度和收敛率的图形比较(不同数量的weightfile和不同范围的weight range)-compare BP[0] MGFPROP[1] SAMGFPROP[2] QUICKPROP[3] SARPROP[4] to solve XOR problem
TIC_TAC_game_gate_level
- Tic Tac Game is a classic game. Two players are using code-named “0” and “1”, fill in rotation in TICTACTOEMIDLET. If any player gates the first straight line will win, and if nobody is successful then the tie 1. Top module name： TT (Filename
1-110521205F7
- 一段时钟程序 实现的功能是时钟功能 很有效-STACK segment para stack stack db 256 dup (0) stack ends data segment para public data count db 100 tenh db 1 hour db 3 ,20h tenm db 1 minute db 0 db : tens db 5 second db 0 ,0
tools
- 数值转换，奇偶校验，异或，bcd转asc 等功能，可自己扩展-Numeric conversion, parity, XOR, features such as the bcd turn asc, can expand their own
Gabor-Magnitude-and-Phase-for-Face
- This paper proposes local Gabor XOR patterns (LGXP), which encodes the Gabor phase by using the local XOR pattern (LXP) operator. Then, we in-troduce block-based Fisher’s linear discriminant (BFLD) to reduce the dimensionality of the proposed des
New-Text-Document
- this routine implements the serial descrambling algorithm in parallel form for the LSFR polynomial: x^16+x^5+x^4+x^3+1 this advances the LSFR 8 bits every time it is called this requires fewer than 25 xor gates to implement (with a stati
vhdl
- library ieee use ieee.std_logic_1164.all entity decoder is port (clk:in std_logic clr:in std_logic data_in:in std_logic --待解码信元输入端； data_out:out std_logic) --解码信元输出端； end decoder architecture behave of decoder is component dff2
1
- Verilog Code By sivanantham and sakthivel Lab assignment-xor gate Do not forget to thank
2
- Verilog Code By sivanantham and sakthivel Lab assignment-xor gate Do not forget to thank
3
- Verilog Code By sivanantham and sakthivel Lab assignment-xor gate Do not forget to thank
4
- Verilog Code By sivanantham and sakthivel Lab assignment-xor gate Do not forget to thank
5
- Verilog Code By sivanantham and sakthivel Lab assignment-xor gate Do not forget to thank
Calcu_Check
- 计算16进制序列的和校验或者异或校验的一款小工具，非常实用，是软件上层、底层开发的得力助手。-Calculate hex sequences and XOR parity check or a gadget that is very practical, is the top software, underlying the development of right-hand man.
homework6
- This is BP for XOR, For 2 hidden neuron
bp
- back propagation algorithm for xor problem
XOR-with-P-delta
- xor function with backpropagation
Design-of-a-fast-convergent-backpropagation
- The main contribution of this paper is using optimal control theory for improving the convergence rate of backpropagation algorithm. In the proposed approach, the learning algorithm of backpropagation is modeled as a minimum time control prob