This thesis devoted to several efficient VLSI architecture design issues in errorcorrecting coding, including finite field arithmetic, (Generalized) Low-Density Parity- Check (LDPC) codes, and Reed-Solomon codes.-This thesis is devoted to sever

Abstract—Selection combining cascaded with maximum-ratio combining (SC/MRC), which is particularly useful when site diversity is available, combined with low-density parity-check (LDPC) codes is able to combat the effects of fading. The biterro