This thesis devoted to several efficient VLSI architecture design issues in errorcorrecting coding, including finite field arithmetic, (Generalized) Low-Density Parity- Check (LDPC) codes, and Reed-Solomon codes.-This thesis is devoted to sever

Set of documents describing various compression techniques 1) Arithmetic coding 2) Burrows Wheeler transform 3) DEFLATE, LZW, LZ77, LZ78 algorithms 4) Discrete wavelet transform 5) Run lenght encoding 6) ZIP and PNG file formats