搜索资源列表
10010.XDva009
- X-Trap Driver X-Trap Driver
13-310010_FSM
- 10010序列检测，用状态机来实现，非常方便-10010 Sequence Detection using the state machine to achieve very convenient
10010
- 卷积码及维特比译码 程序实现卷积编码和维特比译码算法
peak
- 功能是检测一个5位二进制序列“10010”。考虑到序列重叠的可能，有限状态机共提供8个状态（包括初始状态IDLE）。
注册与卸载OCX.rar
- 注册与卸载OCX,-Register and uninstall OCX.
10010
- Verilog状态机设计-10010序列检测器-Verilog state machine design-10010 Sequence Detector
seqdet
- 用verilog鉴定10010序列，用verilog鉴定10010序列-10010 sequence identification using Verilog with Verilog identification sequence 10010
10010
- Where s Waldorf? Given a m by n grid of letters, ( 1<=m, n<=50), and a list of words, find the location in the grid at which the word can be found. A word matches a straight, uninterrupted line of letters in the grid. A word can match
10010
- verilog实现序列10010检测-verilog to achieve detection of sequence 10010
state_m
- 序列检测的代码，检测10010时，为高电平，其余为低电平-Sequence detection code 10010 when testing for the high, and the remaining low. .
dianhua-mt8870
- 最近刚成功开发一款电话远程控制器，当听到电话里面自己录制的音频时非常高兴，觉得10010、10086那些也只是小儿科，呵呵，特把资料及自己写的代码同大家一起分享，-Recently succeeded in developing a telephone remote controller, when the hear the phone when inside their own audio recordings are very pleased to think that those are
10010
- 在Visual Basic 编写的程序中控制鼠标-In a program written in Visual Basic to control the mouse
detect_signal
- 此程序完成一个序列检测的功能，检测10010序列，适当改进，可以用于FPGA中信号检测-This process is complete a sequence of test functions, test 10010 sequence, appropriate improvements can be used for FPGA in the signal detection
Tutorial_5
- 一个序列检测器的FPGA设计实验，通过LED灯显示，基于Spartan-3e开发板-The sequence detector will look for the input series “10010.” LED’s will show how much of the series has been detected and when the entire series has been entered an additional LED will come on. Circuit input
zhuantaiji
- 简单的状态机设计，功能是检测一个5位二进制序列“10010”。考虑到序列重叠的可能，有限状态机共提供8个状态（包括初始状态IDLE）。-Simple state machine design, function is to detect a 5-bit binary sequence " 10010." Taking into account the possibility of overlapping sequences, finite state machines prov
WheresWaldorf
- Solution to UVA Online Judge problem ID=10010 (Wheres Waldorf). Algorithm is programmed in Java and got Accepted.
seqdet_vm
- 在verilog下连续输入1和0，当输入为10010时输出为1，是初学者练习用的-In verilog continuous input 1 and 0, when the input is 10010 to 1 when the output is used for beginners to practice
UVA-10010---Wheres-Waldorf
- UVA 10010 - Wheres Waldorf-UVA 10010- Wheres Waldorf
test-series-10010
- 用于检测序列10010的程序，Verilog的状态机练习-Used to test series 10010 program, Verilog state machine practice