搜索资源列表
usb
- 使用68013的测试程序，包含68013固件程序（采用slave FIFO bulk同步读写，EP2 OUT，EP6 IN），驱动，PC端测试用程序。CPLD的VHDL代码
USB2_0
- USB2_0控制器CY7C68013与FPGA接口的VerilogHDL实现.rar-CY7C68013 and FPGA controller USB2_0 interface VerilogHDL achieve. Rar
Flash_FPAG_JTAG
- FPGA或者CPLD通过JTAG接口对FLASH进行读写的资料。非常有用-Programming Flash Memory from FPAGs and CPLDs Using the JTAG Port. Very useful
SLAVE_FIFO_16BITS
- 68013和FPGA通信 含有68013 slave firmware 含有FPGA VHDL程序-communication between 68013 and FPGA including 68013 slave firmware including FPGA VHDL code
usb_wr_Verilog
- fpga ubs通讯模块 verlog语言 使用EZ-USB FX2-USB interface. use EZ-USB FX2 carry out PC communication with FPGA by USB.
68013
- 使用68013的测试程序，包含68013固件程序-use of cy7c68013,data transfer from usb to pc.
fifo_FPGA
- 68013 FIFO 接口程序，USB开发、VHDL开发(68013 FIFO USB VHDL FPGA)