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verilog实现ALU的源代码
- verilog实现ALU的源代码，并提供了一个详细的测试平台！-achieve ALU Verilog source code, and provide a detailed test platform!
alu32bit
- verilog hdl alu module it is 32bit alu and 1bit alu
ALU
- ALU logic using Verilog
ALU
- vhdl代码 使用quartus编译 cpu中 alu的设计 可作为课程设计的参考 此为16的运算器-VHDL code using Quartus compiler cpu in alu design of curriculum design can be used as a reference for this for 16 computing device
alu
- 这是32位alu的代码，使用verilog写的，包含了简单的运算功能-This is a 32-bit alu code, use verilog to write, and includes a simple arithmetic functions
alu
- 用Verilog编写的简单的运算单元（ALU），可实现加、减、与、或、异或、非、左、右移等功能-Verilog prepared with simple arithmetic unit (ALU), can be add, subtract, and, or, exclusive-OR, non-, left, and other functions shifted to right
verilog-example
- 4位并行乘法器 4位超前加法器 ALU 计数器 滤波器 全加器 序列检测器 移位器-failed to translate
07302529
- 计算机组成原理实验（MAX PLUS） 1.ALU设计 2.MEM设计 3.32位2选1选择器-Principles of Computer Organization Experiment (MAX PLUS) 1.ALU design 2.MEM design 3.32 2 election 1 selector
alu
- 算术运算单元ALU的设计,才用VHDL语言编写,有仿真波形-vhdl alu
alu
- verilog code for alu in RISC processor
alu
- 设计带进位算术逻辑运算单元，根据74LS181功能表，用Verilog HDL硬件描述语言编程实现ALU181的算术逻辑运算功能，编辑实验原理图，在算术逻辑单元原理图上，将其扩展为带进位的算术逻辑运算单元，对其进行编译，并设计波形对其进行仿真验证，最后下载验证-Design into the digital arithmetic logic operation unit, in accordance with menu 74LS181 with Verilog HDL hardware desc
alu
- 加法器FPGA 实现，精简，快速，高效，有仿真文件-adder base on FPGA ，verilog HDL
spartan_alu_8_bit
- Verilog based 8 bit ALU module, implemented on Spartan 3E FPGA.
alu
- ALU modeling verilog codes and testbench
Alu-4bit
- alu 4 bit with verilog in modelsim and work correct
ALU
- a simple 4 bit alu in verilog
alu
- mcu，risc cpu Verilog源代码-mcu，risc cpu Verilog
alu
- arithmetical-logic unit design in Verilog
alu
- the 8 bit alu by verilog
MIPS-ARM-ALU
- 用verilog描述语言实现的MIPS和ARM的ALU程序。-Verilog descr iption language with the MIPS and ARM ALU program.