搜索资源列表
amba3core.rar
- amba3 sva 完全验证的代码，有verilog的和systemverilog的,amba3 sva fully validate the code, and the Verilog and SystemVerilog
ppt
- 介绍 AXI 协议的PPT, 和一个 slave（verilog实现） 接口的简单实现，需要的可以看看；-AXI protocol described PPT, and a slave interface is simple to achieve, need to look at
handshake
- AMBA 3 AXI handshake protocol. Verilog platform. master and slave.
System_Design_and_Implementation_of_AXI_Bus
- AMBA AXI资料，台湾硕士论文，网上收集-AMBA AXI, Taiwanese master' s thesis, on-line collection of
BP062-BU-01000-r0p0-00rel0[1][1].tar
- AXI协议检查器，由ARM公司开发对于想开发AXI master和slave模型的ASIC设计人员非常有用！-AXI protocol checker, developed by ARM to develop for the AXI master and slave model is very useful ASIC designers!
Axi_mux
- The elements come from the necessity of creating generic modules, in the verification phase, for this widely used protocol. These primitives are presented as a not compiled library written in SystemC where interfaces are the core of the lib
AMBA_AHB.rar
- amba AHB coding in verilog HDL and integrating with AHB to AXI Brigde,amba AHB coding in verilog HDL and integrating with AHB to AXI Brigde
verilog-master-files
- Verilog master files of AMBA axi interface
AXI slave
- 使用verilog语言实现了AXI总线通信协议的从机部分(The slave part of AXI bus communication protocol is realized by using Verilog language)
gpio_axi
- Zturn board - GPIO - AXI
axi_ad9361
- AXI_AD9361 的 verilog 驱动工程，包含数据接收，数据发送 AXI总线 ，全部是verliog实现(AXI_AD9361's Verilog drive project, including data reception, data transmission AXI bus, all verliog implementation)
AMBAaxi
- amba axi specification
axi_slave
- amba总线中axi的slave部分，用verilog实现的slave.(The slave part of Axi in the AMBA bus, slave. implemented with Verilog)
src
- 基于AXI 总线的可配置脉冲计数器，可以配置计算脉冲的个数。(The configurable pulse counter based on AXI bus can be configured to calculate the number of pulses)
my_led_ip
- 四通道axi LED灯控制器，用于嵌入式系统中的一些功能指示(The four channel Axi LED lamp controller is used for some function instructions in the embedded system)
new.v
- 状态机写的axi slave，模式较少，基本功能齐全，轻便,仿真综合通过(AXI4 slave programmed by state machine approach)
axi lite 接口
- 该文件完成了简单的axi lite 接口协议 Verilog 语言编程。欢迎交流讨论
verilog-axi-master
- Verilog AXI Components Readme GitHub repository: alexforencich verilog-axi
axi slave model
- axi slave model,verilog源码
AXI slave
- AXI slave 完整 verilog代码。测试验证通过。