搜索资源列表
vhdl-com
- 一些vhdl的常用程序，包括键盘扫描-instantiate some common procedures, including scanning keyboard, etc
elecfans.com-74783742
- FPGA的重要实例,如PSK调制和解调,ASK,FSK-An important example of FPGA, such as PSK modulation and demodulation, ASK, FSK
UART_RX
- receiver data from computer via com-interface.
HammingDecoder
- -- Hamming Decoder -- This Hamming decoder accepts an 8-bit Hamming code (produced by the encoder above) and performs single error correction and double error detection. -- download from: www.pld.com.cn & www.fpga.com.cn LIBRARY ieee U
FFT
- FFT高速傅立叶变换 VHDL完整源码 文档密码：www.armjishu.com 更多资料下载，欢迎登陆网站 www.armjishu.com
ram
- ram的vhdl源代码在colloy实现-ram in the vhdl source code to achieve colloy
61EDA_C1009
- vhdl step motor control
com_port_decoder
- com port decoder implementation
com
- VHDL实现串口功能，可以直接拷贝使用。祝大家用得开心-Serial functional VHDL, you can use directly copy. I wish you all much happier with
xapp856
- 基于FPGA的SFI接口实现（VHDL，Verilog and doc）-SFI-4.1 16-Channel SDR Interface with Bus Alignment
elecfans.com-VHDL
- vhdl深入学习教程，包括数据对象以及实例等，本书详细介绍了数据对象类型以及应用方法等-vhdl-depth tutorials, including data objects and example, the book details the data object types and application methods
ISE_lab17
- VHDL语言实现正选信号发生器，并仿真验证的源程序及代码-VHDL language is selected signal generator, and simulation and verification of the source code
CLOCK-ON-ALTERA-DEV-NOARD-RONTEX
- 这是我上电子线路设计课程时自己写的数字钟设计的整个工程.网上下载安装quartus II软件后双击clock.sof打开调试.若软件说没有权限,请删除db文件夹后再试. 文件夹中附带我的实验报告,其中详细讲解了我的设计思路\软件架构\可能出现的问题等等. 调试步骤就不讲了,管脚分配请网友自行完成. 开发板 Altera Cyclone II EP2C35F672C6 软件平台 Quartus II 语言 verilogHDL-These are all the project
elecfans.com-VHDL
- 很好的电路设计语言VHDL教程,它是目前最流行的硬件描述语言-Good VHDL Directory,Help you master VHDL language
mahdifza@yahoo.com-mous-vga-and-led-ps2
- vhdl mouse ps2 driver show in vga and 20 led and writ in ise7.1(2012)
elecfans.com-RF-Filter
- 这是一个采用cyclong 3实现的数字滤波器的VHDL实现，通过测试，正常-This is a used cyclong 3 implementation of the digital filter of VHDL, test, normal
AlteraFPGACycloneDemo7SerialPort(COM)
- Example shows how to program Altera FPGA Cyclone Family using VHDL Programming Language
vhdl-pipeline-mips0
- MIPS CPU WITH PIPELINE procesador MIPS-FZA -- Autor: mahdi ahmadi -- Email: mahdi@fza.ir -- mahdifza@yahoo.com -- -- Version: 1.0
elecfans.com-
- FPGA很有价值的27实例.rar 包括 LED控制VHDL程序与仿真 2004.8修改.doc-vhdl example
Stracture-vhdl(Techno-Electro.com)
- VHDL Development Research Paper