搜索资源列表
da
- for DA 16 FIR tell.rar
串行DA算法实现FIR滤波器
- 串行DA算法实现16阶FIR滤波器
6tapFIR.rar
- 6阶FIR+verliog+分布式算法（DA）,6 bands FIR+ Verliog+ Distributed Arithmetic (DA)
FIRde-verilog-shixian
- 有符号DA算法的FIR滤波器的Verilog实现-A symbol of the algorithm of DA FIR filters Verilog realized
fft_fir_filter_latest.tar
- 数字滤波器的源代码，已经仿真，FIR ，分布式算法，FPGA-digital filter multerRTL,FIR,DA,FPGA,shixian wancheng
16_FIR
- 16阶FIR滤波器--本设计用VERILOG HDL语言串行DA算法实现16阶有限频率响应滤波器！-16-order FIR filter- this design language VERILOG HDL serial DA algorithm limited frequency response of 16-order filter!
DA_fir
- 基于分布式算法的FIR滤波器设计及FPGA实现-Distributed algorithm based on FIR filter design and FPGA realization of
verilog.DA.FIR..
- 用verilog写的16阶串行DA算法FIR滤波器-Verilog written by 16-order FIR filter serial DA algorithm
FIR
- 实时语音FIR滤波设计 通过TLC320AD50采集音频信号，然后对其进行高通（FIR）滤波，将滤波后的数据输出到TLC320AD50，经TLC320AD50的DA转换后输出。-FIR filter design real-time voice capture through TLC320AD50 audio signal, and then its high-pass (FIR) filtering, the filtered data output to the TLC320AD50,
msp430
- msp430 实验代码 1,MSP430开发基础 2，键盘设计 3，数码管显示电路设计 4，液晶模块接口 5，MSP430 CRC 6，中文输入法 7，数据压缩算法 8，FIR滤波 9，FFT算法 10，波特率自动识别 11,串行存储 12；NAND flash 接口 13；A/ D，TLV2541 14；DA DAC8830 15；ADS1241 16；温度 TMP100 17；定时器 DAC
da
- FIR滤波器利用串行DA算法实现16阶的，直接可用 ，用VHDL编程-Serial DA FIR filter algorithm using 16 bands, directly available, VHDL programming
FIR
- 本程序实现了FIR滤波器，使用了全并行的分布式DA算法，附有仿真波形。-FIR filter with DA
DA-FIR
- 采用DA算法实现FIR滤波器的设计实验原理建模仿真-DA algorithm using FIR filter design principles of modeling and simulation experiments
FIR
- 在matlab环境下编写的完整程序。其中包含DA AD 转换-Written in the matlab environment, the full program. Which contains the DA AD conversion
da_fir
- DA实现FIR滤波器，8阶对称系数。滤波器输入位宽为12bit。-DA FIR filter implementation, 8 symmetric coefficients. Filter input bit width is 12bit.
DA-FIR-FPGA
- 详细介绍了分布式算法FIR的设计，对于用FPGA实现FIR的设计具有指导意义。来自华中科大。-Detailed design of a distributed algorithm FIR, FPGA implementation for the FIR design with a guide. From HUST.
DA_FIR_VERILOG
- 基于DA算法的FIR滤波器的verilog实现-DA-based FIR filter algorithm to achieve the verilog
fir
- fir滤波器的几种结构virelog代码（串行，并行，DA结构以及多相抽取结构），程序包为ise工程-fir filter several the structure virelog code (serial, parallel, DA structure and multiphase extraction structure), the program package for the ise project
DA-500-600
- Distributed arithmetic used for multiplier-less FIR filter implementation to reduce the computational complexity.
verilog-fir
- 基于verilog的三种不同方式的fir滤波器 fir1:直接型 fir2：串行DA fir3：并行DA-Fir filter for the verilog three different ways fir1: direct type fir2 of: serial of DA fir3: parallel DA