搜索资源列表
DDR_SDRAM_Controller
- DDR RAM控制器的VHDL源码，实现平台是Lattice FPGA，功能验证通过-DDR RAM controller VHDL source code, achieving the platform of Lattice FPGA, functional verification through
ddr_ctrlv
- ddr ram controller vhdl code
DDR_SDRAM.rar
- DDR RAM控制器的VHDL源码, 实现平台是Lattice FPGA,DDR RAM controller VHDL source code, the realization of Lattice FPGA platform is
ref-ddr-sdram-vhdl
- 基于VHDL编写的DDR-SDRAM控制器的编程，目前是业界常用的RAM控制器-VHDL prepared based on the DDR-SDRAM controller programming, is currently the industry s commonly used RAM controller
20060510191318991
- ALTERA公司DDR ram controller资料-ALTERA company DDR ram controller information
SouceCode_0f_DDR_SDRAM_Controller_by_VHDL
- VHDL语言编写的DDR RAM控制器的源码。-VHDL language source controller DDR RAM.
ddr_sdr
- ddr ram控制器，使用vhdl语言实现-ddr ram controller,designed by vhdl