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slave_spi_ctrl.rar
- SPI 的FPGA控制源代码，用于一般通用的SPI技术，FPGA/CPLD控制的AD数据采集,SPI control course code
SPI_slave-fpga_arm
- 使用SPI接口，使得FPGA与ARM进行通讯. 设置寄存器和读取数据-communicateion FPGA and ARM using SPI
CC2500programmingusingAlteraFPGA
- This document gives the code for programming a CC2500 transceiver using Altera Stratix FPGA. The FPGA and CC2500 are connected through SPI mode with the FPGA as the master and CC2500 as the slave.
CoreSPI
- 数字电子设计fpga设计的spi接口的ip_core，可以直接用于在fpga设计，支持actel的fpga芯片，支持主从模式，fifo大小可选。-Fpga design of digital electronic design spi interface ip_core, fpga design can be directly used to support actel the fpga chip, support master-slave mode, fifo size options.
FPGA-SPI-Slave
- SPI通信基于NI FPGA，利用FPGA硬件对SPI通信进行解析。-SPI communication based on NI FPGA。Build the communication between PC and SPI device
SPI_FPGAFOLLOW
- FPGA作为从机的SPI模块，VHDL语言编写，quartus2开发-FPGA as a slave SPI module, VHDL language, quartus2 development
spi_master
- 用VHDL编写的一个SPI主机程序，SPI模块采用最常用的模式0方式（即CPOL=0,CPHA=0）通信。文件内含测试文档，已在Modelsim6.5上测试通过，可在FPGA上直接调用。-A SPI Master code edited by VHDL language,the SPI modul use 0 MODE(i.e CPOL=0,CPHA=0)to communicate with the SPI Slave.and there is a testbench in the file
SPI_fpga_w_r_sigle
- verilog fpga spi slave 收发测试 有简单的协议 modelsim仿真通过 -simple protocol modelsim verilog fpga spi slave transceiver test simulation by
SPI_slave-SPI-control-ADS8364
- FPGA控制ADS8364采集，采集的数据通过SPI上传，SPI做从机slave。-FPGA control ADS8364 acquisition, upload the data collected through the SPI port, SPI do slave slave.
spi_slave
- SPI功能模型，可以用于SPI的仿真验证工作，对其进行测试-Now for the SPI slave in the FPGA. Since the SPI bus is typically much slower than the FPGA operating clock speed, we choose to over-sample the SPI bus using the FPGA clock. That makes the slave code slightly more compli
STM32F407_SPI_send
- SPI主发送数据，供FPGA接收对比解调效果使用，SPI接收端程序见 FPGA_SPI_recive_display.rar - SPI master transmit data for FPGA receiver demodulates effect using contrast, SPI slave program, see FPGA_SPI_recive_display.rar
spi_slave_lattice
- 这是基于lattice fpga 做的spi slave模块。简单易懂，适合初学者。代码使用状态机描述。整个工程在diamond2.0版本编译运行。-This is based on lattice fpga do spi slave module. Easy to understand for beginners. The code using a state machine descr iption. The whole project is run diamond2.0 version o
SPI-slave-system
- FPGA时序逻辑设计：串行外围设备接口SPI从设备系统，包括串行时钟线SCK，主机输入/从机输出MISO，主机输出/从机输入MOSI和低电平有效的从机选择线SS。环境为Quartus。-FPGA Timing Logic Design: Serial Peripheral Interface SPI Slave Device System Includes Serial Clock Line SCK, Host Input/Slave Output MISO, Host Output/Slave
AN84868 - Source files for FX3 Firmware
- 通过Cypress的EZ-USB FX3的SPI接口对Xilinx FPGA进行配置(AN84868 shows you how to configure a Xilinx FPGA over a slave serial interface using FX3 which is the next-generation USB 3.0 peripheral controller.)
spi_no_cs_13
- FPGA作为从机与STM32的全双工通信，FPGA将接收到STM32的数据返回到STM32，Modelsim仿真和板子仿真都通过(Use FPGA as slave,realize the communication between FPGA and STM32. The function has been tested is no problem.)
spi master slave
- SPI master slave (fpga/verilog)
spi
- 利用VHDL在FPGA内实现SPI总线的主从控制器设计(SPI Master and Slave Controller)
spi slave程序
- spi slave的verilog程序，有测试平台testbench程序，实现fpga作为salve的功能(spi slave verilog program)