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pll_base_second
- 二阶锁相环的基本MATLAB仿真模型 说明了二阶环对频率阶跃的有效跟踪-second-order PLL basic MATLAB simulation model shows the second part of the effective frequency tracking Step
Tracking
- 实现gps卫星的跟踪功能。载波跟踪环采用锁频环辅助下的锁相环，码跟踪环采用延迟锁相环。-Gps satellite tracking to achieve. Carrier tracking loop using the aid of frequency-locked loop PLL, code tracking loop using delay locked loop.
PLL
- 三项锁相环：利用park变换和clark变换，将三相电网电压，变换为两相旋转坐标系下的电压。同时跟踪A相电压的相位角-Three phase-locked loop: the use of park conversion and clark transformation, the three-phase voltage, transformed into two-phase rotating coordinate system voltage. While tracking the phase
pll
- 数字通信中的锁相环（PLL）完整程序，包括噪声处理，可用于GPS的的跟踪和捕获-the matlab code of PLL ,including how to deal with the noise ,which can be used to acquiring and tracking on GPS
costas
- costas for gps its a pll tracking used for gps and galileo
PLL(lin)
- 锁相环的设计主要用于载波跟踪代码，在载波跟踪捕获当中可能会用到的源代码-PLL design is mainly used for carrier tracking code, the carrier capture which may be used to track the source code
track
- gps信号的跟踪，采用锁相环实现，包括码环的跟踪和载波的跟踪环-gps signal tracking, the use of PLL implementation, including code and carrier tracking loop tracking loop
DesignoftrackingloopofGPSsoftwarereceiver
- 本文在分析GPS 软件接收机跟踪原理的基础上，首先比较码环与载波环不同鉴相器的性能，然后对二阶锁相环中不同环路参数设下的跟踪效果进行仿真分析，最后设计 了合适的码环与载波环路，并用实际采集的GPS 数据论证了所设计环路的有效性，为GPS 软件接收机跟踪环路的设计提供了参考。-Based on the analysis of GPS receiver tracking software on the basis of the principle, first compare the diffe
Technologyofcarriertrackingforhighdynamicsignalsba
- 高动态给载波的跟踪带来了很大的困难,本文研究采用锁频环( FLL) 和锁相环( PLL) 相结合的方法来实现 载波跟踪-High dynamic to the carrier' s tracking has led to great difficulties, this paper uses frequency-locked loop (FLL) and phase-locked loop (PLL) methods to achieve a combination of carrie
FLL
- 锁频环又称为自动频率控制（AFC）环，其利用反馈回路对输入频率变化进行调整，最后达到对频率的跟踪，广泛应用于雷达，卫星导航等领域对多普勒频率的跟踪。-Locked loop, also known as automatic frequency control (AFC) loop, the use of feedback loop to adjust the input frequency changes, and finally achieve frequency tracking is wi
spll_simplest_IQ
- 利用科斯塔斯环实现软件锁相环，完成信号相位的跟踪-Costas loop using software PLL to achieve complete phase tracking signal
A-novel-algorithm-implementing-PLL
- 设计了一种新颖的三相锁相环的设计算法，可以用于不平衡电压的相位检测和跟踪。-A modified soft phase lock loop algorithm improving the performance inDynamic phase tracking and detection of unbalanced voltage
Phase1111_Tracking
- 使用Verilog编写的相位跟踪器，可以有效解决锁相环中的相位跟踪问题，ISE12.2下编译通过-Written in Verilog phase tracker can effectively resolve the PLL phase tracking, ISE12.2 compiled by
pll
- 单载波 BPSK QPSK调制下的PLL功能实现 实现频率相位的跟踪-Single carrier BPSK QPSK modulation the PLL frequency phase tracking
DSPBasedDigitalControlOfOnlineUPS
- 本文介绍了一种控制对象以中小型UPS为模型的、基于TMS320F240的数字化控制平台的样机实验系统。经对比系统采用了单极性调制的SPWM方式，并根据核心处理芯片的各类资源给出了一套具体的软硬件数字化实现方案。系统硬件部分主要包括输出电压、输出电流、市电频率/相位等各类信号的采集和处理，以及输出PWM信号的隔离、驱动等。系统软件部分则包括UPS各种系统功能的实现，其中主要研究了软件锁相环(市电跟踪)、有效值调节、各类保护、PWM波的生成、闭环控制等的实现。-This article descri
LPC2292
- LPC2292采用PHILIPS LPC2292微处理器，可实现高达60MHz工作频率,片内晶体振荡器和片内PLL。LPC2292是一款基于16/32位ARM7TDMI-S，并支持实时仿真和跟踪的CPU，并带有256 k字节(kB)嵌入的高速Flash存储器-LPC2292 PHILIPS LPC2292 microprocessor, can achieve up to 60MHz operating frequency, on-chip crystal oscillator
test_pll_2
- 锁相环的verilog源代码，其中包括发送端，鉴相器，滤波器，压控振荡器的源代码，主要实现输入输出信号的跟踪，捕获和锁定，使输入输出信号在较短时间内达到同步。-This is a verilog code for PLL, including transmitor, PDF, Filter, VCO and so on. It mainly realize the input and output signal tracking, capture and lock, make the in
PLL
- 设计一个LabVIEW的锁相环程序，实现频率跟踪。-LabVIEW program to design a phase-locked loop to achieve a frequency tracking.
pll
- Phase Locked Loops (PLL) Introduction to PLL The concept of Phase Locked Loops (PLL) first emerged in the early 1930’s.But the technology was not developed as it now, the cost factor for developing this technology was very high. Since the adva
PLL
- 测量三相交流电源的线电压，使用PLL跟踪其相位或者频率，对于锁相环的设计和学习，有一定的参考价值。(Measuring the line voltage of three-phase AC power supply and tracking its phase or frequency with PLL are of certain reference value for the design and learning of PLL.)