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learn_dds.基于quartus ii 9.0的简易dds波形发生器
- 基于quartus ii 9.0的简易dds波形发生器，可以产生正弦，方波，三角波，可变幅，可变频。非常适合学习使用，使用时请按自己的芯片和引脚设置,Quartus ii 9.0 Based on dds simple waveform generator can produce sine, square, triangle wave can be amplitude, frequency can be. Very suitable for learning to use, when used
VHDL.rar
- 教你在Quartus II中如何实用LPM库，对与FPGA系统设计有很好指导作用,Teach you how to Quartus II in the LPM utility library, with the FPGA system design have a very good guide
DDS
- 基于quartus的DDS，可以发生正弦波，方波，三角波，附带了顶层文件，注释在程序中-Quartus on the DDS, can occur sine wave, square wave, triangle wave, with the top-level documents, notes in the procedure
LMS-vhdl-coad-
- 基于quartus的LMS 自适应滤波器代码，适合初学者 -The LMS adaptive filter based on quartus code, suitable for beginners
uart
- uart的vhdl实现，包含完整quartus工程文件，相信会有较大帮助-uart vhdl quartus
quartus-11.0-crack
- quartusⅡ+11.0破解器,最新版quartus破解软件，可用。-quartus Ⅱ+11.0 cracker
clk_vhdl
- Quartus II工程压缩文件，是一个典型的基于FPGA的数字钟工程项目，有50MHz分频、计数、译码等模块。采用VHDL语言编写。-Quartus II project files, is a typical FPGA-based digital clock project, there are sub-50MHz frequency, counting, decoding modules. Using VHDL language.
TLC5510_IIPRAM1
- FPGA控制双口RAM、实现TLC5510采样控制双口RAM读写！QUARTUS II8.0平台仿真验证通过，并在硬件上运行通过测试！-FPGA control of dual-port RAM, the realization of sampled-data control TLC5510 dual-port RAM read and write! QUARTUS II8.0 platform through simulation and hardware to run through the
ff
- QUARTUS II平台上的基于VHDL语言的电梯系统控制程序。-QUARTUS II platform based on the VHDL language elevator system control procedures.
vga_timing
- 此乃VGA驱动的详细源码，并配有PLL。使用Quartus II 开发。-This is a detailed source VGA driver with a PLL. Use Quartus II development.
piano
- 电子琴，quartus开发环境，硬件连接模型，蜂鸣器-piano
ADC0809
- 用状态机对A/D转换器0809的采样控制电路的实现。工具：Quartus ii 6.0 语言：VHDL-State machine used for A/D converter sampling control circuit 0809 is achieved. Tools: Quartus ii 6.0 Language: VHDL
Timer
- ep2c5 实现 定时器 verilog语言，quartus 2 仿真-verilog language to achieve ep2c5 timer, quartus 2 Simulation
EP1C3_12_7_SPCTR
- 基于FPGA的信号采集及频谱分析，用VHDL编写，压缩包里是Quartus下的工程。AD采样用状态机实现，并存入LPM_RAM。设计了一个UART模块（也是状态机实现的），可将数据发到ＰＣ机上。-FPGA-based signal acquisition and spectral analysis, prepared with VHDL, Quartus compression bag is the next project. AD sampling state machine used to
servo_module_worked
- verilog pwm to control servo motor on quartus
vhdl-MIPS
- Quartus-Altera Nios... VHDl based, complete MIPS implementation, document, flowcharts plus code
quartus-work
- 基于FPGA的VERILOG的分频器的设计，10分频设计的源代码和设计思路-Based od FPGA
Avalon_VGA
- vga显示彩色图像ip，alter开发板-vga display color image,vhdl,quartus
UART-VHDL-QUARTUS
- uart vhdl quartus for altera
traffic-light-vhdl-Quartus-II6.0
- 简单的交通灯vhdl程序 Quartus II6.0下的程序 包含图形仿真-easy traffic light vhdl Quartus II6.0