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verilog实现ALU的源代码
- verilog实现ALU的源代码，并提供了一个详细的测试平台！-achieve ALU Verilog source code, and provide a detailed test platform!
ALU
- vhdl代码 使用quartus编译 cpu中 alu的设计 可作为课程设计的参考 此为16的运算器-VHDL code using Quartus compiler cpu in alu design of curriculum design can be used as a reference for this for 16 computing device
alu
- 这是32位alu的代码，使用verilog写的，包含了简单的运算功能-This is a 32-bit alu code, use verilog to write, and includes a simple arithmetic functions
5
- simple code based on verilog shifter , cla ,clg , ALU ,PC, decoder , tb_top
alu_Verilog
- It is the code for implementing the project titled "The Reconfigurable Instruction Cell Array(IEEE 2008)".
alu
- verilog code for alu in RISC processor
ALU8
- ALU算术逻辑单元，8位，含源程序以及仿真后的波形图-ALU arithmetic logic unit 8, including source code, as well as post-simulation waveform
alu
- ALU modeling verilog codes and testbench
xilinx_primitives
- verilog code for alu
alu_32_bit
- 一个Verilog语言写的３２位ＡＬＵ的源码。-A language written in Verilog source code for a 32-bit ALU.
4
- simple code based on verilog shifter , cla ,clg , ALU , PC
ALU
- 算术逻辑部件的verilog代码，它能够实现半加器、全加器、比较、按位与、按位或、按位异或、加一、减一的操作-Arithmetic logic unit of the verilog code, it can achieve half adder, full adder, compare, bitwise and, bitwise or, bitwise xor, plus one, minus one operation
pipelALU
- pipeline ALU verilog code
lab-1-ALU-design-with-Verilog-HDL
- cpu设计的运算器部分verilog代码，实验资料，包括原理和代码，在modelsim仿真通过-CPU design arithmetic unit part of the verilog code, experimental data, including the principle and code, through the modelsim simulation
alu
- verilog code for 8 bit alu
ALU
- This MIPS ALU verilog code-This is MIPS ALU verilog code
[Source code] 32bit_ALU_code_verilog
- 32bit ALU project source code
ALU
- this verilog code is alu. which is perform addition and sub,mul,div
project_copy3
- 利用verilog实现的alu代码，可以进行加减移位等操作(Using Verilog to achieve Alu code, you can add, delete, shift and other operations)
alu_shifter
- alu and shifter verilog code as text file