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- 七段数码管显示，可以循环显示一段数字代码，移位速度可由开关控制。本程序可在basys2板子上跑起来-Seven-Segment LED display, you can cycle through a numeric code, the shift speed by switching control. This program can be run up on the board in basys2
DDS
- basys 2实现DDS，外接dac0832，实现dds模块，基于xilinx的ide-basys 2 to achieve DDS, external dac0832, achieve dds module, based on the ide xilinx
FPGAmusicBox_gunKaragoz.net
- Simple music box using a Digilent Basys2 Xilinx Spartan 3E-100 FPGA.
ps2_interface
- PS2 interface for Spartan 3e(basys2)and aplication
mxule
- 实现12阶m序列的VHDL，在BASYS2板上测试，平台为Xilinux12，经测试可用，且可修改函数式输出不同阶的m序列-12 order m-sequence of VHDL in the BASYS2 board test platform for Xilinux12 has been tested and available, and can modify the function output sequence of order m
Introduction-to-Basys-II
- 对FPGA basys2板的基本介绍，包括结构和功能等方面-A basic introduction to the the FPGA basys2 plate, including the structure and function
chufa
- 四位有符号数字除法 用于basys2板子-divider divider for basys2 sjtu
xulie
- 序列检测器 用于BASYS2板子 教学用-this is a xulie checker
password
- password vhdl代码 用于basys2板子-password for basys SJTU STUDENTS
mimasuo
- 数字密码锁 sjtu 用于教学 basys2板子-digital codelock for SJTU
TimingTheWorld_Decimal
- 计时,最短时间为100Hz，BASYS2 board,FPGA 可以在7-Segment上显示时间。-Timing the world
Keyb27Seg
- VHDL codes for Multiplexed 7 segment LED, verified for Spartan3E (Basys2) FPGA board. This is part of Digital System Design course at Fasilkom UI.
counter60
- 利用实验板实现模六十计数，即00—01—02—03—04—…59—00—01…，并在Basys2实验板的AN1~AN0与（LD7~LD0）上显示。-Experimental plate to achieve mode 60 counts, namely 00-01-02-03-04- ... 59-00-01 ... AN1 ~ AN0 Basys2 experiment board with (LD7 ~ LD0).
sequence
- 利用Basys2 FPGA 开发板实现简单的序列检测器-Basys2 FPGA development board to achieve a simple sequence detector
Ram_FIFO
- 利用Basys2 FPGA 开发板实现FIFO_ram -Basys2 FPGA development board to achieve FIFO_ram
basys2
- BASYS2 board,FPGA，实现M12序列的生成并加在低频二进制信号上（输入信号），之后实现了位同步提取。-BASYS2 board, FPGA, to achieve M12 sequence generation and added to the low-frequency binary signal (input signal), and then to achieve the bit synchronization extraction.
FPGA-BASYS2
- 基于FPGA BASYS2开发板的数字钟，能够实现计时，时间校准，闹钟，整点报时等功能。-Development board based on FPGA BASYS2 digital clock, to achieve timing, time calibration, alarm, hourly chime functions.
状态机_5110
- 基于basys2开发板的5110图片显示程序(5110 picture display program based on basys2 development board)
lab1
- basys2开发板的入门教程实验Leb1源代码,开关与按键控制发光管(Basys2 development board introductory tutorial experiment Leb1 source code, switch and key control light emitting tube)
Count_255
- 该代码用Verilog语言在Basys2板上实现了255位译码器，编码从SW0~SW7输入，LED灯分时显示译码内容。(The code implements the 255 bit decoder on the Basys2 board with Verilog language, encoding from SW0~SW7 input and LED lamp time to display decoding content.)