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This is a convolutional interleaver code written in verilog, the ram is sram with ram_ncs, ram_nwe, ram_noe characters.
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用Verilog实现卷积码（2，1，2）的编码器，采用状态机来完成在modelsim下的仿真-Verilog implementation using convolution code (2,1,2) encoder, using a state machine to complete the modelsim simulation under the
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convolution code for beginers in the field of communication
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本文在介绍卷积码原理和描述方式的基础上以1/2卷积码为例重点详细阐述了基于Verilog HDL 的卷积码的编器的设计-This paper introduced the convolution code on the principles and methods described in 1/2 convolutional code as an example focuses elaborated convolution based on Verilog HDL code compiled
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这是用ISE编写的verilog语言1/2码率的卷积编码的代码-It is written in verilog language ISE convolution coding rate 1/2 code
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This the code for the convolutional and the test bench for this in the verilog code.-This is the code for the convolutional and the test bench for this in the verilog code.
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Source code for convolution of two complex number is written in Verilog language
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