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Quartus II工程压缩文件，是一个典型的基于FPGA的数字钟工程项目，有50MHz分频、计数、译码等模块。采用VHDL语言编写。-Quartus II project files, is a typical FPGA-based digital clock project, there are sub-50MHz frequency, counting, decoding modules. Using VHDL language.
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数字钟设计，有分秒显示，上下午显示，可下载到FPGA板子上进行数字显示哦-Digital clock design, there are minutes and seconds display, on the afternoon of shows can be downloaded to the FPGA on the board figures show Oh
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用verilog实现的数字跑表，下载到FPGA开发板上验证通过。下载后从新分配引脚即可用。-Verilog implementation using digital stopwatch, download to FPGA development board to verify the adoption. After the download you can use the new distribution of pins.
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Altera Cyclone II FPGA Starter Board原理图-Altera Cyclone II FPGA Starter Board Schematic
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具有定时可调多功能数字电子钟，本人已经在fpga上调试成功-With adjustable multi-function digital electronic clock timer, I have been successful in the fpga debugging
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Describe: This VHDL digital clock, the use of digital control and FPGA design to achieve a number of counter clock, show hours, minutes ,seconds and alarm. The procedure depends on the metric system and consider six decimal counter preparation. The e
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多功能数字钟Verilog HDL的源码，能够整点报时，报整点数，设定任意时刻闹钟，低音高音两种频率。-Multi-function digital clock Verilog HDL source code, set the alarm clock at any time, bass treble two frequencies. It s for FPGA.
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Digital clock applicatian using seven segment with fpga xilinx
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基于FPGA 的数字时钟SHEJI-Digital Clock in the FPGA
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基于ＦＰＧＡ的数字钟设计，编程语言是VHDL，编程环境是Quartus-digital clock based on FPGA
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VHDL语言的数字时钟的设计，用于FPGA的数字时钟的设计。-VHDL language digital clock design, FPGA for digital clock design
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这是基于FPGA的多功能数字时钟设计。是一篇论文，看看吧。-This is the design of FPGA-based multi-function digital clock. A paper, look at it.
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在FPGA上运行，控制步进电机和数字时钟的程序-Running on the FPGA to control the stepper motor and digital clock program
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基于fpga的多功能数字时钟设计，有预设和报警功能-Fpga-based design of multi-function digital clock, presets and alarm functions
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FPGA数字跑表代码 Digital Clock-Digital Clock
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基于FPGA的数字时钟设计，这里是我做的一个电子时钟，大家可以借鉴一下！-Based FPGA digital clock design
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基于FPGA的数字时钟，具有显示时分秒和闹铃设置功能-digital clock base on FPGA
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嵌入式FPGA数字时钟，能实现时钟提示，显示功能-The embedded FPGA digital clock,
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FPGAverilog数字时钟,基于quartal ii 下的数字时钟电路程序-FPGA verilog digital clock
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FPGA写的多功能数字钟，非常适合初学FPGA的同学，作为参考吧。-FPGA write multifunction digital clock, FPGA is ideal for beginner students, as a reference to it.
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