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这是一个用51单片机实现的能进行浮点运算(包括浮点乘法,除法等)的计算器-This is a use of the MCS-51 microcontroller capable of floating-point operations (including floating point multiplication, division, etc.) Calculator
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浮点除法子程序,可以高效率计算浮点浮点除法,程序短小精干,非常讨巧-floating-point division subroutine, high efficiency calculation float float division, procedures small and lean, very quick and easy
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是Nios II處理器下客製化指令的一個32位元浮點數除法器，可將兩IEEE 754格式的值進行相除,Nios II processors are customized instruction under a 32-bit floating-point divider can be two format IEEE 754 value division
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介绍一组浮点数的运算代码，包括加减乘除运算的VHDL代码实现-Introduced a set of floating-point code of the operation, including addition and subtraction multiplication and division operations to achieve the VHDL code
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本程序实现标准浮点数除法。
入口参数：被除数在ARGBH1:ARGBL1:EXP1中，除数在ARGBH2:ARGBL2:EXP2中。
出口参数：结果在ARGBH1:ARGBL1:EXP1中。-This procedure to achieve the standard floating-point division. Entrance parameters: dividend in ARGBH1: ARGBL1: EXP1, the divisor in ARGBH2: ARGBL2:
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高精度的浮点数除法运算，基于浮点运算的FPGA实现，单精度浮点数-High-precision floating-point division operation, the FPGA based on the realization of floating-point operations, single precision floating point
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建议计算器，能进行浮点数的加减乘除，swing界面-Recommended calculator for floating-point addition and subtraction, multiplication and division can, swing interface
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用java编写的浮点数除法的运算，计算机组成原理课程设计-Prepared by floating-point division with java computing, computer architecture course design
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本程序实现PIC标准浮点数除法。
入口参数：被除数在ARGBH1:ARGBL1:EXP1中，除数在ARGBH2:ARGBL2:EXP2中。
出口参数：结果在ARGBH1:ARGBL1:EXP1中。
占用资源：W,STATUS,020H~02BH,两重堆栈。
说 明: 1.加载本文件的同时也加载了另外2个文件"DUSUB.ASM","DUADD.ASM"
故用户在使用这2个子程序时可直接调用,不必重新加载.- This program to achieve the
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Floating Point Division for MIPS with full Comments
Use PCSpim to open and run
first open float.s
second open main.s
click "No" for the PCSpim Dialog "Clear program and reinitialize simulator before loading"
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verilog code floating point division
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本资料详细的介绍了利用单片机实现浮点数除法的一些相关程序-This material detailed introduced the use of SCM realizing floating-point division of some relevant procedure
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浮点除法运算及其在单片机上的实现 论文 -Floating-point division and its implementation on the papers in SCM
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单片机浮点数除法的快速编程的方法，新的思路，好文章！-Single-chip floating-point division of the fast programming methods, new ideas, good article!
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本程序实现标准浮点数除法。入口参数：被除数在ARGBH1:ARGBL1:EXP1中，除数在ARGBH2:ARGBL2:EXP2中。出口参数：结果在ARGBH1:ARGBL1:EXP1中。-This procedure to achieve the standard floating-point division. Entrance parameters: dividend in ARGBH1: ARGBL1: EXP1, the divisor in ARGBH2: ARGBL2: EXP2 i
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使用verilog写的32位浮点数加法模块、浮点数乘法模块、浮点数除法模块、浮点数指数模块。指数模块是综合前面三个例化成泰勒级数求指数，迭代次数（可设置）决定了精度。-Use verilog write 32-bit floating-point addition module, floating-point multiplication module, floating-point division module, the floating point number index module.
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VHDL浮点除法运算，VHDL浮点数除法，源码，含仿真图 -VHDL floating point division, source code, including simulation mapVHDL floating point division, source code, including simulation map
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基于FPGA的32位浮点数除法运算，占用资源少，运算速度较快-Floating-point division based on FPGA
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Arithmetic and logic unit for floating point single precision addition/substruction, multiplication, division and square root.
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使用vhdl写的32位 64位浮点数加法模块、浮点数乘法模块、浮点数除法模块(Use vhdl write 32-bit 64bit floating-point addition module, floating-point multiplication module, floating-point division module)
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