搜索资源列表
risc cpu
- 一个很好的16位cpu ip内核，用quartus写的
ALU
- vhdl代码 使用quartus编译 cpu中 alu的设计 可作为课程设计的参考 此为16的运算器-VHDL code using Quartus compiler cpu in alu design of curriculum design can be used as a reference for this for 16 computing device
CPU
- 一个多周期CPU的完整设计，quartus平台，Verilog实现，内含实验报告，和详细的各模块功能表-Complete a multi-cycle CPU design, quartus platform, Verilog implementation, includes lab reports, and a detailed menu of each module
CPU8051V1
- 可用的CPU8051，已经多个项目验证，希望更多的朋友使用它开放！-CPU8051
niosII_system_cpu
- cpu代码，可在ISE或quartus下完成调试-cpu code, can be accomplished under the ISE or Quartus debugging
LCD
- Quartus, Sopc Builder搭建的CPU，通过NIOS控制LCD。工程文件。-Quartus, Sopc Builder to build the CPU, through the NIOS control LCD. Engineering documents.
pipeline
- 用Quartus II 设计的3级流水CPU，指令采用二次重叠执行方式-Quartus II design with three-stage pipeline CPU, instruction execution overlaps with the second time
Microprogramcontroller
- 微程序控制器部件实验，使用VHDL语言使用Quartus测试通过，模拟CPU-Micro-program controller component experiments, the use of VHDL language use Quartus test, simulation CPU
mips
- MIPs CPU，VERILOG代码，经过QUARTUS综合，时序分析，验证无误。-MIPS CPU
PipelineCPU
- Quartus II 7.2环境中，采用硬件描述语言VHDL独立完成了基于MIPS指令集的32位RISC处理器的逻辑设计-quartusII mips pipeline 32bit cpu design
CPU
- 一个完整的流水CPU设计，quartus平台，Verilog实现-CPU design a complete water, quartus platform, Verilog realization
danzhouqiCPU
- VHDL单周期CPU设计,基于Quartus II 开发平台-VHDL single-cycle CPU design, Quartus II development platform based on
cpu
- 一个简单的CPU设计，支持add，sub，mvi，mv四条指令，用Verilog语言编写，在Quratus II上编译通过，仿真正确。-A simple CPU design, support add, sub, mvi, mv four instructions, with the Verilog language, compiled by the Quratus II, the simulation is correct.
CPU
- 这是用Quartus II 6.0做的CPU实验，是计算机组成原理专题实验。-This is done using Quartus II 6.0 CPU experiment, experimental feature is the computer organization.
CPU
- 武汉大学计算机组成原理综合实验 quartus cpu 模型-Wuhan University, Computer Organization Model of Integrated Experiment quartus cpu
cu
- 基于quartus的CPU设计中核心部件，控制存储器的架构-Quartus CPU design based on the core components, control memory architecture
CPU
- 4位和8位，8运算，QUARTUS简易处理器,能在Quartus上运行-4 and 8-bit, 8 operations, QUARTUS simple processors, can run on the Quartus
cpu
- 这是一个quartus语言编写的单周期cpu，可以进行运算、存储等功能。-This is a quartus language of single-cycle CPU, computing, storage and other functions.
CPU-with-VHDL-16-32
- 在quartus中运行的32位指令集的16位CPU程序，模块化设计，包括MBR, BR, MR, ACC, MAR, PC, IR, CU, ROM, RAM, ALU等模块-In the the quartus run 32 16-bit CPU instruction set procedures, modular design, including the MBR, BR, MR, the ACC, the MAR, the PC, the IR CU, the ROM, RAM, ALU
cpu
- 8位实验CPU设计利用设计好的指令系统，编写汇编代码，以便测试所有设计的指令及指令涉及的相关功能。设计好测试用的汇编代码后，然后利用Quartus II软件附带的DebugController,编写汇编编译规则。接着，利用DebugController软件把汇编编译之后的二进制代码置入到所采用的存储器中，并对设计好的8位CPU进行测试。-Eight experiments designed CPU design using the instruction set, write assembly