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float_data_multiple_use_fixed_
- 采用fpga做小数运算的程序，使用了三级流水线技术，这是学习流水线和定点小数乘法很好的例子！,a program of float multiply, using 3-stage pipeline technology
cpu
- 5 stage pipeline CPU, verilog HDL code-5 stage pipeline CPU
DES_IP
- 有效的改进3-DES算法的执行速度，采用了多级流水线技术，设计了一种高速的硬件结构，使得原来需要48个时钟周期才能完成的运算，现在只需要一个时钟周期就可以完成。另外通过增加输入/输出的控制信号。使得该IP可以方便的集成到SOC中，大大缩短了SOC的设计周期。-Effective 3-DES algorithm to improve the implementation of speed, multi-stage pipeline technology, designed a high-speed
MIMO(1)
- 在初始阶段，首先需要对所仿真的MIMO无线信道的仿真场景进行选择。仿真场景是指典型城区、恶劣城区、郊区或者乡村等信道传播环境，以及通信的方向，即是上行链路还是下行链路-At the initial stage, first of all, the need for the simulation of the MIMO wireless channel selection simulation scenario. Simulation refers to a typical urban scene
taxi-company-later-stage
- Project: taxi-company-later-stage This project provides a partial implementation of a simulation of taxis operating on a city grid to pick up and transport passengers. This is the fourth stage of this project. It illustrates the implementation
pipeline
- 用Quartus II 设计的3级流水CPU，指令采用二次重叠执行方式-Quartus II design with three-stage pipeline CPU, instruction execution overlaps with the second time
jifenlvboqi
- 为了解决软件无线电通信系统中频采样之后的极大数据量在基带处理部分对DSP计算的压力,常采用多速率处理技术.多速率处理过程中需要使用积分梳状滤波器、半带滤波器和高阶FIR滤波器.在分析了积分梳状滤波器的结构和特性的基础上,阐述了多级CIC滤波器一种高效的FPGA实现方法,该方法的正确性和可行性通过Quartus Ⅱ的时序仿真分析得以验证,实际中可以推广应用.-In order to solve software-defined radio communications system after I
program
- 可以将分割完的子图像进行二值化，二值化效果很明显，易于下一步的分割识别-You can split end of the sub-image binarization, thresholding effect is obvious and easy to identify the next stage of segmentation
onekftwostagekf
- Two-stage kalman filter
A-multi-stage-vendor-selection-mixed-integer-progr
- 一种多阶段供应商选择的混合整数规划模型A multi-stage vendor selection mixed integer programming model-A multi-stage vendor selection mixed integer programming model
WH_T27_2007-stage-achinery-Acceptance-Test-Procedu
- WH_T27_2007舞台机械验收检测程序WH_T27_2007 stage machinery Acceptance Test Procedures-WH_T27_2007 stage machinery Acceptance Test Procedures
multi.stage.amplifier.circuit.document
- 多级放大电路开发设计经典文档Development of multi-stage amplifier circuit design classic document -Development of multi-stage amplifier circuit design classic document
Pipelined-MIPS
- MIPS架构5级流水线设计，支持常用的整数指令。-5-stage pipeline MIPS architecture designed to support common integer instructions.
Five-Stage-of-Hacking
- five stage to hack your system
The-second-stage
- jhkdiy 第二阶段视频相关资料 -jhkdiy :The second stage of the video information
A-Two-Stage-Selective-Averaging-LDPC-Decoding
- A Two Stage Selective Averaging LDPC Decoding
DSP6713-fisrt-stage
- DSP6713 fisrt stage,DSP入门教程资料，包括二次boot-DSP6713 fisrt stage，包括二次boot code
-A-Single-Stage-Three-Phase-Grid-Connected
- Single-stage grid-connected photovoltaic (PV) systems have advantages such as simple topology, high efficiency, etc. However, since all the control objectives such as the maximum power point tracking (MPPT), synchronizationwith the utility volt
Two-Stage Channel Estimation for Low SHF Band
- 提出一种新的信道估计算法，在二级信道估计和低超频带。(A new channel estimation algorithm is proposed, in which two stage channel estimation and low over band are employed.)
Stage-3.2.2-Source.tar
- robot 仿真模拟，开源系统，功能强大，linux系统支持(Player/Stage is an open software project built and maintained by the international academic robotics community, available through SourceForge. robot sys)