搜索资源列表
verilog.HDL.examples
- 许多非常有用的 Verilog 实例: ADC, FIFO, ADDER, MULTIPLIER 等-many very useful Verilog examples : ADC, FIFO, ADDER, MULTIPLIER etc.
adc
- 编写verilog代码 利用实验箱上的A/D芯片完成模数转换。输入电压由实验箱提供，其幅值在0~5V间变化，由电位器控制。输出信号显示输入的模拟电压值，由数码管显示为2位BCD码的形式。
ADC
- 用verilog编程实现的基于FPGA的AD数据采集程序
FPGA控制AD程序,ADC,DAC转换接口
- FPGA控制AD程序,ADC,DAC转换接口.rar 有限状态机控制AD采样.rar,FPGA control AD procedure
ADC0832_test.rar
- ADC0832是一个8-bit的ADC转化芯片，工作频率为250Khz，最大频率可达400Khz，转化通道有两个，输入电压可分有单端或差分形式。本测试使用单端电压输入形式，从昔年的CH0输入电压，使用Xilinx XC3S200AN开发板，并且使用Xilinx ise工具中的ChipScope工具来查看转化后的DO数据是否正确。经验证，输入电压范围是0V--5.5V,当电压达到5.5V时，满刻度.,ADC0832 is an 8-bit conversion of the ADC chip, t
Verilog_ADCtestcode
- ADC测试的verilog代码，可以下载到FPGA上面实现对ADC性能测试。-the test code for ADC of verilog
adc
- 用verilog实现TLC549——AD采集实验，采集完的数送给数码管显示-TLC549- AD Acquisition experimental collection finished with verilog number sent to the digital tube display
TCL2543
- 基于FPGA的TLC2543控制器,采用状态进行控制ADC进行转换-The TLC2543 controller based on FPGA, using state control of ADC conversion
ADC_INTERFACE
- it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit. -it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix i
ADC_CONTROL_VERYLOG
- 运行在FPGA上的Verilog程序(实现对ADC的控制)-Verilog procedures (the achievement of the control of the ADC)
ADC
- verilog code for ADC
ADControl
- 用verilog实现，ADC控制，源代码，可进行仿真-Verilog with the realization of, ADC control, source code, can be simulated
verilog-A_library
- Complete Verilog-A library for analog blocks, like ADC, DAC, amplifiers
verilogsigma-deltaadc
- 用verilog编写的sigma-deltaADC的源程序。-code of verilog for sigma delta ADC
adc2
- ADC control in VHDL language. Spartan 3E starter pack ISE 10.1
16bitADC
- verilog实现的16位模数转换器参考源代码-verilog to achieve 16-bit ADC reference source code
ADC
- a verilog code about dac of audio codec on fpga board.
verilogadc0809
- verilog adc0809控制器FPGA实现，编译通过，系统时钟分频，满足ADC时钟要求。-verilog adc0809 controller FPGA, compiler, system clock frequency to meet the requirements of ADC clock.
adc
- 设计ADC控制器，Verilog代码.利用有限状态机设计方法在FPGA上设计ADC0809的接口控制器，采样结果送到数码管显示出来。-ADC controller design, Verilog code using finite state machine design in the FPGA design ADC0809 interface controller, the sampling results to the digital display.
XADC
- xilinx verilog FPGA驱动AD9613 数据采集DEMO程序(Xilinx Verilog FPGA drives AD9613 data acquisition DEMO program.)