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  1. Filter_Convolution_Example

    0下载:
  2. Example of a convolution filter implemented in Vivado HLS, the high level synthesis tool Xilinx-Example of a convolution filter implemented in Vivado HLS, the high level synthesis tool Xilinx
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-12
    • 文件大小:815byte
    • 提供者:rickyalbert
  1. ds1302

    0下载:
  2. ds1302时钟芯片 C51源代码 ,所有功能实现-DS1302 clock chip C51 source code
  3. 所属分类:SCM

    • 发布日期:2017-05-05
    • 文件大小:29.94kb
    • 提供者:eric
  1. DS1307_I2C2

    0下载:
  2. ds1307, using keil c, stm32f103 easy to understand how and why it happen
  3. 所属分类:ARM-PowerPC-ColdFire-MIPS

    • 发布日期:2017-05-11
    • 文件大小:2.34mb
    • 提供者:la a
  1. base

    0下载:
  2. freertos 移植好的模版,基于FreeRTOSV8.2.3-Migrated templates, based on FreeRTOS V8.2.3
  3. 所属分类:ARM-PowerPC-ColdFire-MIPS

    • 发布日期:2017-05-22
    • 文件大小:6.32mb
    • 提供者:高玛峰
  1. TFTLCD

    0下载:
  2. TFTLCD触控显示屏操作清洗系统,主要提供一套简洁明了的操作界面-TFTLCD touch screen operation cleaning system
  3. 所属分类:ARM-PowerPC-ColdFire-MIPS

    • 发布日期:2017-05-07
    • 文件大小:1.43mb
    • 提供者:于晨生
  1. synd

    0下载:
  2. Syndrome calculator basic unit for reed solomon decoder in verilog language
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-12
    • 文件大小:807byte
    • 提供者:humberto
  1. Timer2

    1下载:
  2. 本软件是STM32f407芯片的TIMER操作软件。我已经测验了在STM32f407开发板。为了STM32f开发,很有用的软件-This software is the STM32f407 chip TIMER operating software. I ve been testing the STM32f407 development board. In order to STM32f development, very useful software
  3. 所属分类:ARM-PowerPC-ColdFire-MIPS

    • 发布日期:2017-05-26
    • 文件大小:8.27mb
    • 提供者:kc218
  1. behavioral-hmwk5

    0下载:
  2. Design a synchronous circuit which monitors a 3-bit code as the input. If the code has a constant value in four consecutive clock cycles, a flag is activated.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-12
    • 文件大小:543byte
    • 提供者:mafa87
  1. code

    0下载:
  2. Design the logic required for a “Dancing Light” system including 5 lights which are turned on repeatedly
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-12
    • 文件大小:919byte
    • 提供者:mafa87
  1. code-hmwk7

    0下载:
  2. Make the required flag signals using the input clock signal (clk) and input flag (TKN). Whenever the TKN signal is activated, a sequence of activation of flag signals should be performed based on the timing diagram
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-12
    • 文件大小:770byte
    • 提供者:mafa87
  1. hmwk3try.vhd

    0下载:
  2. Design a circuit that take three N-Bit binary numbers as inputs and calculate the average of the largest number and the smallest number as the output. Note that the length of the input numbers should be defined variable
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-12
    • 文件大小:807byte
    • 提供者:mafa87
  1. PT2258-driver

    1下载:
  2. 6通道音量控制器,PT2258,驱动程序-6 channel fader PT2258 driver
  3. 所属分类:SCM

    • 发布日期:2017-05-05
    • 文件大小:48.38kb
    • 提供者:叶欣
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