资源列表
m-Sequence
- FPGA,verilog,输出M序列，已调试成功，可直接在Quartus上打开。-FPGA, verilog, output M sequence, has been successfully debugged, can be opened directly on the Quartus.
phase_move
- FPGA平台，ve已调试，verilog语言，实现对波形的移向，模块。-FPGA platform, ve has been debugged, verilog language, to achieve the shift to the waveform, the module.
ADC
- 利用AD原理设计的可调节数字电压表，数码管显示的数字精确到小数点后三位-Use AD design principles adjustable digital voltmeter, digital display of the number is accurate to three decimal places
595
- 用595芯片来控制的，使数字电压表数据显示在数码管上，精确到小数点后三位-With a 595 chip to control, so that the digital voltmeter data are displayed on digital tube, accurate to three decimal places
cl
- 1位停止位，字符长度8位，波特率9600，每从串口收到一个字符，则立即将此字符从串口重新发出-1 stop bit, character length 8, 9600 baud, each received a character the serial port, then immediately re-issued this character the serial port
ck
- 无奇偶校验位，1位停止位，字符长度8位，波特率9600，每1s经串口发送1字符“A”-No parity, 1 stop bit, character length 8, 9600 baud, 1 character per 1s sent through the serial port " A"
pwm-music
- 能够使蜂鸣器配合pwm发出音乐，按下按键后就可以发出音乐-It enables the buzzer with pwm issued music, after pressing the key issue of music
smart-light-ctrl
- 自主研发的智能路灯控制系统，具有TFT显示屏显示，定时开关，单独控制等功能-Intelligent street light control system
DDR_TEST
- 基于xc65slx16的ise 14.7 DDR3测试模版，经过验证，可供fpga开发参考学习，也可作为开发模版。-Based on xc65slx16 ise 14.7 DDR3 test template, validated and can be used for reference in the fpga development study, also can be used as a template development.
watch_dog
- 基于EPM1270F256实现的4路看门狗控制逻辑，实现了滤波、延时、复位功能。-Based on EPM1270F256 4 road guard dog control logic, to realize the function of filtering, time delay and reset.
STM32F107-TCP
- STM32F107 TCP客户端收发数据实验（裸机）-STM32F107 TCP client send and receive data experiment (bare metal
HT66F50LED
- HT66F50单片机LED霹雳灯程序，合泰单片机的简单应用-HT66F50-LED thunderbolt lights program, simple application of Hetai Singlechip