资源列表
关于SPI总线的读写程序
- 这是有关SPI总线的一段读写程序，请大家支持试用。-This is the section of the SPI bus literacy program, we support the trial.
vdf
- Perhaps the highliest customizable library for LCD displays around. Designed for ATMega microcontrollers using CodevisionAVR,
ddc_cic3_hf
- vhdl语言实现CIC滤波器，用于数字下变频-vhdl
Full.adder
- Verilog的RTL级别全加器和测试平台，测试通过-Verilog RTL level full adder and test benck
txc_ad9957ctrl
- ad9957芯片配置程序，包括将并行18位数据专程spi口传输。基于quartusII创建-ad9957 chip configuration procedures, including a special trip to the parallel 18-bit data transfer spi port. Created based on quartusII
UART_Transmitter
- 将16为并行数据转换为串行数据输出，可以根据需要方便的更改位宽和数据长度-The 16 parallel data into serial data output, you can easily change the bit width required and the data length
uart_tx
- uart通信中的发送模块，在串口通信中，用于对外设进行通信，发送相应的指令，调节其时序逻辑。-uart communication sending module, in the serial communication, the communication of the peripheral and send the corresponding instruction, and to adjust its timing logic.
DCO_ST
- 单相数字锁相环 鉴相器 环路滤波器 数控振荡器-Single-phase digital phase-locked loop phase detector loop filter numerically controlled oscillator
saomiao
- 基于vhdl语言的数码管动态扫描显示程序代码，同时加有数码管闪烁，超欠量程的led灯显示报警附加动能-Vhdl language-based digital control of dynamic scanning display program code, while adding a digital tube flashes, over and under range of led lights display alarm additional kinetic energy
Square-Root
- Square Root code in VHDL
I2S
- 本代码提供一种音频I2S读取数据的verilog代码，并且向fifo写入-This code provides an I2S audio data is read verilog code, and write to the fifo
hardware-rake_mrc1
- 采用硬件描述语言verilog进行RAKE MRC变换的实现的代码-Using hardware descr iption languages Verilog implementation ofRAKE MRC converter code