资源列表
cic3s32
- 一个3阶的32位抽取的cic滤波器的verilog源代码
1
- 调用了库函数，用原代的指令设计流水灯程序，简单易懂-Call a library function, using the original instructions on behalf of the design procedures for water lights, easy-to-read
lab9_0~60
- 顯示0~60的循環數,可顯示在SEG上方!-Showing 0 to 60 cycles, SEG can be displayed in the top!
TXD_2
- TxD with ROM transmitter
frequency
- 8位十进制数字频率计的底层设计VHDL程序-8-bit decimal underlying design of digital frequency meter VHDL program
Pseudo-random
- 伪随机序列FPGA应用设计代码 Pseudo-random sequence-Pseudo-random sequence of application design
shuangji
- 用c51实现双j机通信的功能，在对方的单片机数码管上显示本机按下的键值，总共6个键，所以最大只显示到6-C51 achieve double-click the communication function of the machine to press the key on the other side of the single-chip digital tube display, a total of six keys, so the maximum display only to 6
four-speed-light-water
- 独立式键盘控制的4级变速流水灯，8灯4速，键盘扫描，中断-Stand-alone keyboard-controlled four-speed light water, lights 4-speed, keyboard scan interrupt
uartrx
- FPGA的verilog uart 接收端程序。非常实用-The FPGA verilog uart receiving end procedures. Very practical
MC9S12XS128--ATD
- XS128 AD例程 这个例程包括Mc9s12xs128单片机ATD驱动程序-XS128 AD routines This routine including Mc9s12xs128 microcontroller ATD driver
dwt_32
- Haar wavelet for an image of 32*32.
AD0804_control
- 配置AD0804的VHDL代码，经过验证可参考学习-Configure AD0804 VHDL code, reference study validated