资源列表
FSM02
- 异步复位状态机 -- State Machine with Asynchronous Reset -- dowload from: www.fpga.com.cn & www.pld.com.cn -asynchronous reset state machine -- State Machine with Asynchronou 's Reset -- dowload from : www.fpga.com.cn
cnt8bc
- 8位加减带异步复位计数器，使用双向输入管脚- Design an 8-bit up and down synchronous counter in VHDL with the following features: The same ports are used for signals to be inputted and outputted. The ports are bi-directionally buffered. The counter is with an asynch
jsq
- 本程序为24小时计时器，稳定无误差。简单好用，是Verilog HDL语言初学者的指引。-This procedure for 24-hour timer, stable error-free. Easy-to-use, is the Verilog HDL language beginners guide.
ad7862
- 4通道12位AD芯片 AD7862控制模块,VHDL源代码,适于单次转换采样,250K采样率.-4-channel 12-bit AD chip AD7862 control module, VHDL source code, suitable for single conversion sampling, 250K sampling rate.
ddscore
- dds基本结构，能进行相位累加，具有调相功能-dds basic structure of the phase can accumulate, with the phase modulation function
code_lock
- 用verilog语言设置一个简易密码锁，当顺序输入137966时，密码正确，led灯亮。 -Verilog language setting with a simple lock, when the order of input 137966, the password is correct, led lights.
SIPO-PISO-register
- Package contains two VHDL module: one for serial in and parallel out (SIPO) register and other for parallel in and serial out (PISO) register.
SCM-keyboard44
- 单片机矩阵键盘扫描程序， 功能是 ,按下按键放手的时候才生效, 程序带解释详细易懂-SCM keyboard scanning procedures
1
- 按键与流水灯的简易控制系统，按下按键对应灯亮起，按两次进入警报系统-buttons and leds
image
- 用来产生bayer彩色格式的图像测试程序，可生成彩色条纹，2tap输出-Bayer color format used to generate the image of a test program that can generate colored stripes, 2tap output
hexdump
- 一个函数的代码，用于将任意数据块以hexdump的方式打印。-A function of the code, used to arbitrary data blocks hexdump way to print.
async_fifo
- 用verilog编写的简单异步fifo。可以给初学者用来学习fifo的初步工作原理。（不能直接使用。）-Verilog prepared by the simple asynchronous fifo. Can be used for beginners to learn fifo the initial working principle. (Can not be used directly.)