资源列表
LFSR
- lfsr implement in fpga
AUTO_SELL_DRINK
- 这是用verilogHDL语言编写的自动出售饮料的电路。会根据顾客投入硬币的多少来送出饮料，并且找回零钱。-This is language used verilogHDL automatic circuit the sale of beverages. Customer input will be based on the number of coins out drinks, and get back change.
memory
- the memory program are used to design the fpga application for in very log module
Muliply
- 16-bit multiplier in VHDL
slave_tb
- 实现对slave模块仿真的tb，利用三态始能实现。-verilog slave tb is useful
counter4
- 四位数码管计数，可以从0000一直计数到9999，用七段数码管显示。- 4 data counter，you can use it to count from 0 to 9999.
Part3
- Quartus for 8x8 multiplier using lpm mult module from the library of parameterized modules in the Quartus II system.
COM
- 基于uCOS的串口模块，包含接收和输出缓存，已测试。-uCOS_II based RS232 module, including input and output buffer. The code has been tested.
true_dual_port_ram_single_clock
- Quartus II VHDL Template. True Dual-Port RAM with dual clock.
shaomiaoqudong
- 完成扫描显示驱动电路的设计，实现在8 个数码管上轮流显示字符0－F 的功能。 -Complete the scan driver circuit design, implementation turns eight digital tube display characters 0-F.
FreqTest
- 基于周期法测量频率的单片机程序，已调试通过，很好用，直接加入工程文件即可运行使用。-frequency measure based on MCU。
PWM
- stc硬件pwm。使用定时器0溢出作为时钟，只有初始化成功才能使用任意频率。-STC hardware pwm. Use timer 0 overflow as a clock, only the initial success can be used at any frequency.