资源列表
REG8
- 寄存器的VHDL源码.可能有点简单 新手大家间量 希望和大家学习-VHDL source register. May be a bit simple volume between novice you would like to learn
file_io
- 读写硬盘文件的VHDL仿真例程，该例程能够帮助FPGA设计人员读取硬盘的数据文件输入仿真环境，并且将仿真后的数据存入硬盘-test bench for reading and writing disk files
main
- 单片机读取USB中的内容，并通过显示屏显示-Microcontroller to read the contents of USB in and through the display shows
vsim
- multiplexer 16_1 is a multiplexer with 16 inputs and 1 output.
sine_80
- a zip file , useful information on dsk kit-a zip file , useful information on dsk kit...............
decision_reg.vhd
- Variable register example
display-of-the-clock
- 一个教初学着开发的应用程序，简单易懂，用延迟的方法来计算时间，做一个时钟显示-Teach a beginner with applications developed, easy to understand, to calculate the time delay, to do a clock display
exp3
- 花样流水灯：8个发光二极管D1~D8分别接在单片机P0.0-P0.7端口上，一个开关接在P3.0上。要求输出端口输出“0”时，发光二极管亮。开关闭合时，开始按P0.0+P0.7、P0.1+P0.6、P0.2+P0.5、P0.3+P0.4的顺序依次点亮LED，再按P0.3+P0.4、P0.2+P0.5、P0.1+P0.6、P0.0+P0.7的顺序点亮LED，重复循环。开关断开时，立刻停止点亮指示灯。-Mood Light water: 8 LEDs D1 ~ D8, respectively, c
m16_uart
- atmega16 串口收发数据程序，亲测通过-atmega16 serial procedures, pro-test by
DS1302
- 基于51单片机，运用DS1302的时间显示C程序-51, use the DS1302 C language program
DS1302-READ-AND-WRITE
- 时钟芯片DS1302例程，程序编写简洁易懂，适合初学者。-the read and write function of DS1302
ADCrepeat-channel
- 在每一個序列後，4個轉換結果 移動A0results[]，A1results[] A2results[]， 和A3results的[]。-In each sequence, four conversion results move A0results [], A1results [] A2results [], ' and A3results of [].